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MC10H105 数据表(PDF) 1 Page - ON Semiconductor

部件名 MC10H105
功能描述  Triple 2-3-2-Input OR/NOR Gate
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制造商  ONSEMI [ON Semiconductor]
网页  http://www.onsemi.com
标志 ONSEMI - ON Semiconductor

MC10H105 数据表(HTML) 1 Page - ON Semiconductor

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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
2–128
REV 5
© Motorola, Inc. 1996
3/93
Triple 2-3-2-Input OR/NOR
Gate
The MC10H105 is a triple 2–3–2–input OR/NOR gate. This MECL 10H part
is a functional/pinout duplication of the standard MECL 10K family part, with
100% improvement in propagation delay, and no increases in power–supply
current.
• Propagation Delay, 1.0 ns Typical
• Power Dissipation 25 mW/Gate (same as MECL 10K)
• Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
• Voltage Compensated
• MECL 10K–Compatible
MAXIMUM RATINGS
Characteristic
Symbol
Rating
Unit
Power Supply (VCC = 0)
VEE
–8.0 to 0
Vdc
Input Voltage (VCC = 0)
VI
0 to VEE
Vdc
Output Current — Continuous
— Surge
Iout
50
100
mA
Operating Temperature Range
TA
0 to +75
°C
Storage Temperature Range — Plastic
— Ceramic
Tstg
–55 to +150
–55 to +165
°C
°C
ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%) (See Note)
0
°
25
°
75
°
Characteristic
Symbol
Min
Max
Min
Max
Min
Max
Unit
Power Supply Current
IE
23
21
23
mA
Input Current High
IinH
425
265
265
µA
Input Current Low
IinL
0.5
0.5
0.3
µA
High Output Voltage
VOH
–1.02
–0.84
–0.98
–0.81
–0.92
–0.735
Vdc
Low Output Voltage
VOL
–1.95
–1.63
–1.95
–1.63
–1.95
–1.60
Vdc
High Input Voltage
VIH
–1.17
–0.84
–1.13
–0.81
–1.07
–0.735
Vdc
Low Input Voltage
VIL
–1.95
–1.48
–1.95
–1.48
–1.95
–1.45
Vdc
AC PARAMETERS
Propagation Delay
tpd
0.4
1.2
0.4
1.2
0.4
1.3
ns
Rise Time
tr
0.5
1.5
0.5
1.6
0.5
1.7
ns
Fall Time
tf
0.5
1.5
0.5
1.6
0.5
1.7
ns
NOTE:
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,
after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit
board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through
a 50–ohm resistor to –2.0 volts.
MC10H105
LOGIC DIAGRAM
DIP
PIN ASSIGNMENT
VCC1
AOUT
AOUT
AIN
AIN
BOUT
BOUT
VEE
VCC2
COUT
COUT
CIN
CIN
BIN
BIN
BIN
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
12
15
13
14
5
2
43
11
7
9
6
10
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).


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