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DAC53401_V01 Datasheet(数据表) 31 Page - Texas Instruments

部件型号  DAC53401
说明  DACx3401 10-Bit and 8-Bit, Voltage-Output Digital-to-Analog Converters With Nonvolatile Memory and PMBus™ Compatible I2C Interface in Tiny 2 × 2 WSON
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
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DAC53401 Datasheet(HTML) 31 Page - Texas Instruments

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DAC53401, DAC43401
www.ti.com
SLASES7 – JULY 2019
Product Folder Links: DAC53401 DAC43401
Submit Documentation Feedback
Copyright © 2019, Texas Instruments Incorporated
8.6.5 DAC_DATA Register (address = 21h) (reset = 0000h)
Figure 12. DAC_DATA Register
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
X
DAC_DATA[9:0] / DAC_DATA[7:0] – MSB Left aligned
X
X
W
X
Table 22. DAC_DATA Register Field Descriptions
BIT
FIELD
TYPE
RESET
DESCRIPTION
15-12
X
X
0h
Don't care
11-2
DAC_DATA[9:0] / DAC_DATA[7:0]
W
000h
Writing to the DAC_DATA register forces the respective DAC
channel to update the active register data to the DAC_DATA.
Data are in straight binary format and use the following format:
DAC53401: { DATA[9:0] }
DAC43401: { DATA[7:0], X, X }
X = Don’t care bits
1-0
X
X
0h
Don't care
8.6.6 DAC_MARGIN_HIGH Register (address = 25h) (reset = 0000h)
Figure 13. DAC_MARGIN_HIGH Register
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
X
MARGIN_HIGH[9:0] / MARGIN_HIGH[7:0] – MSB Left aligned
X
X
W
X
Table 23. DAC_MARGIN_HIGH Register Field Descriptions
BIT
FIELD
TYPE
RESET
DESCRIPTION
15-12
X
X
0h
Don't care
11-2
MARGIN_HIGH[9:0] /
MARGIN_HIGH[7:0] – MSB Left
aligned
W
000h
Margin high code for DAC output.
Data are in straight binary format and use the following format:
DAC53401: { MARGIN_HIGH[[9:0] }
DAC43401: { MARGIN_HIGH[[7:0], X, X }
X = Don’t care bits
1-0
X
X
0h
Don't care
8.6.7 DAC_MARGIN_LOW Register (address = 26h) (reset = 0000h)
Figure 14. DAC_MARGIN_LOW Register
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
X
MARGIN_LOW[9:0] / MARGIN_LOW[7:0] – MSB Left aligned
X
X
W
X
Table 24. DAC_MARGIN_LOW Register Field Descriptions
BIT
FIELD
TYPE
RESET
DESCRIPTION
15-12
X
X
0h
Don't care
11-2
MARGIN_LOW[9:0] /
MARGIN_LOW[7:0] – MSB Left
aligned
W
000h
Margin low code for DAC output.
Data is in straight binary format and follows the format below:
DAC53401: { MARGIN_LOW[[9:0] }
DAC43401: { MARGIN_LOW[[7:0], X, X }
X = Don’t care bits
1-0
X
X
0h
Don't care




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