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SN74CBT3125C 数据表(PDF) 2 Page - Texas Instruments

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部件名 SN74CBT3125C
功能描述  QUADRUPLE FET BUS SWITCH 5-VBUS SWITCH WITH -2-V UNDERSHOOT PROTECTION
Download  15 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

SN74CBT3125C 数据表(HTML) 2 Page - Texas Instruments

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SN74CBT3125C
QUADRUPLE FET BUS SWITCH
5V BUS SWITCH WITH 2V UNDERSHOOT PROTECTION
SCDS122A − JULY 2003 − REVISED OCTOBER 2003
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
QFN − RGY
Tape and reel
SN74CBT3125CRGYR
CU125C
SOIC − D
Tube
SN74CBT3125CD
CBT3125C
SOIC − D
Tape and reel
SN74CBT3125CDR
CBT3125C
SSOP − DB
Tube
SN74CBT3125CDB
CU125C
−40
°C to 85°C
SSOP − DB
Tape and reel
SN74CBT3125CDBR
CU125C
−40 C to 85 C
SSOP (QSOP) − DBQ
Tape and reel
SN74CBT3125CDBQR
CU125C
TSSOP − PW
Tube
SN74CBT3125CPW
CU125C
TSSOP − PW
Tape and reel
SN74CBT3125CPWR
CU125C
TVSOP − DGV
Tape and reel
SN74CBT3125CDGVR
CU125C
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
FUNCTION TABLE
(each bus switch)
INPUT
INPUT/OUTPUT
FUNCTION
INPUT
OE
INPUT/OUTPUT
A
FUNCTION
L
B
A port = B port
H
Z
Disconnect
logic diagram (positive logic)
1A
1OE
SW
1B
3A
3OE
SW
3B
2A
2OE
SW
2B
4A
4OE
SW
4B
2
1
9
10
3
8
5
4
12
13
6
11
Pin numbers shown are for the D, DB, DGV, PW, and RGY packages.


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