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STC12C5A60S2 数据表(PDF) 85 Page - STCmicro Technology Co,.Ltd

部件名 STC12C5A60S2
功能描述  single-chip microcontroller based on a high performance 1T architecture 80C51 CPU
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制造商  STC [STCmicro Technology Co,.Ltd]
网页  http://www.stcmicro.com/
标志 STC - STCmicro Technology Co,.Ltd

STC12C5A60S2 数据表(HTML) 85 Page - STCmicro Technology Co,.Ltd

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STC MCU Limited.
4.2 P4/P5 of STC12C5A60S2 series
The processes accessing P4 and P5 are same with common P1, P2 and P3 which all are bit addressable. The
address of P4 is C0H and P5 is C8H.
The address of P4 port is C0h. Every bit in P4 all can be bit-addressable, bit address of P4 are shown below
bit
P4.7
P4.6
P4.5
P4.4
P4.3
P4.2
P4.1
P4.0
bit address
C7h
C6h
C5h
C4h
C3h
C2h
C1h
C0h
The address of P5 port is C8h. Every bit in P5 all can be bit-addressable, bit address of P5 are shown below
bit
----
P5.3
P5.2
P5.1
P5.0
bit address
CBh
CAh
C9h
C8h
P4.4, P4.5, P4.6 and P4.7 are located at the pins - PSEN, ALE, EA and RST of conventional 80C51. Pay attention
that additional control bits on P4SW register are used to enable the I/O port functions of these pins. Prior to use
them as I/O port, the users must set the corresponding bit to enable it.
Register P4SW is used to set the secondary function of NA/P4.4, ALE/P4.5 and EX_LVD/P4.6
Mnemonic Add
Name
7
6
5
4
3
2
1
0
Reset Value
P4SW
BBH Port-4 switch
LVD_P4.6 ALE_P4.5 NA_P4.4
x000,xxxx
NA/P4.4: 0, P4SW.4=0 when MCU is reset. NA/P4.4 is weak pull-up and no any function.
1, when P4SW.4 is set to 1, NA/P4.4 is as an I/O port (P4.4)
ALE/P4.5: 0, P4SW.5=0 when MCU is reset. ALE/P4.5 is as ALE signal which is used to access external data
memory .
1, when P4SW.5 is set to 1, ALE/P4.4 is used as an I/O port (P4.5)
LVD/P4.6: 0, P4SW.6=0 when MCU is reset. EX_LVD/P4.6 is as External Low-Voltage Detection function
1, when P4SW.6 is set to 1, EX_LVD/P4.6 is used as an I/O port (P4.6)
In STC-ISP writter/programmer, users can select what RST/P4.7 is used as. the pin RST/P4.7 is as reset function
acquiescently, see the following figure.
85


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