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LP8733 Datasheet(数据表) 12 Page - Texas Instruments

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部件型号  LP8733
说明  LP8733xx Dual High-Current Buck Converter and Dual Linear Regulator
下载  82 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
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LP8733 Datasheet(HTML) 12 Page - Texas Instruments

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 12 page
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12
LP8733
SNVSBK2 – SEPTEMBER 2019
www.ti.com
Product Folder Links: LP8733
Submit Documentation Feedback
Copyright © 2019, Texas Instruments Incorporated
(1)
Cb refers to the capacitance of one bus line.
6.6 I
2C Serial Bus Timing Parameters
These specifications are ensured by design. Unless otherwise noted, VIN_Bx = 3.7 V. See
(1) and Figure 1.
MIN
MAX
UNIT
fSCL
Serial clock frequency
Standard mode
100
kHz
Fast mode
400
Fast mode+
1
MHz
High-speed mode, Cb = 100 pF
3.4
High-speed mode, Cb = 400 pF
1.7
tLOW
SCL low time
Standard mode
4.7
µs
Fast mode
1.3
Fast mode+
0.5
High-speed mode, Cb = 100 pF
0.16
High-speed mode, Cb = 400 pF
0.32
tHIGH
SCL high time
Standard mode
4
µs
Fast mode
0.6
Fast mode+
0.26
High-speed mode, Cb = 100 pF
0.06
High-speed mode, Cb = 400 pF
0.12
tSU;DAT
Data setup time
Standard mode
250
ns
Fast mode
100
Fast mode+
50
High-speed mode
10
tHD;DAT
Data hold time
Standard mode
10
3450
ns
Fast mode
10
900
Fast mode+
10
High-speed mode, Cb = 100 pF
10
70
High-speed mode, Cb = 400 pF
10
150
tSU;STA
Setup time for a start or
a repeated start
condition
Standard mode
4.7
µs
Fast mode
0.6
Fast mode+
0.26
High-speed mode
0.16
tHD;STA
Hold time for a start or a
repeated start condition
Standard mode
4
µs
Fast mode
0.6
Fast mode+
0.26
High-speed mode
0.16
tBUF
Bus free time between a
stop and start condition
Standard mode
4.7
µs
Fast mode
1.3
Fast mode +
0.5
tSU;STO
Setup time for a stop
condition
Standard mode
4
µs
Fast mode
0.6
Fast mode+
0.26
High-speed mode
0.16
trDA
Rise time of SDA signal
Standard mode
1000
ns
Fast mode
20
300
Fast mode+
120
High-speed mode, Cb = 100 pF
10
80
High-speed mode, Cb = 400 pF
20
160




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