MC100EL29 datasheet(1/3 Pages) ONSEMI

部件名	MC100EL29

功能描述	Dual Differential Data and Clock D Flip-Flop With Set and Reset

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制造商	ONSEMI [ON Semiconductor]

网页	http://www.onsemi.com

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MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

4–1

REV 1

7/95

Dual Differential Data and Clock

D Flip-Flop With Set and Reset

The MC100LVEL29 is a dual master–slave flip flop. The device

features fully differential Data and Clock inputs as well as outputs. The

MC100EL29 is pin and functionally equivalent to the MC100LVEL29 but

is specified for operation at the standard 100E ECL voltage supply. A VBB

output is provided for AC coupling, refer to the interfacing section of the

ECLinPS Data Book (DL140) for more information on AC coupling ECL

signals. Data enters the master latch when the clock is LOW and

transfers to the slave upon a positive transition on the clock input.

The differential inputs have special circuitry which ensures device

stability under open input conditions. When both differential inputs are left

open the D input will pull down to VEE and the D input will bias around

VCC/2. The outputs will go to a defined state, however the state will be

random based on how the flip flop powers up.

Both flip flops feature asynchronous, overriding Set and Reset inputs.

Note that the Set and Reset inputs cannot both be HIGH simultaneously.

• 1100MHz Flip–Flop Toggle Frequency

• 20–lead SOIC Package

• 580ps Propagation Delays

VBB

Logic Diagram and Pinout: 20-Lead SOIC (Top View)

CLK0

D1

CLK1

17

18

16

15

14

13

12

4

3

5

6

7

8

9

Q0

11

10

Q0

S0

S1

VCC

Q1

VEE

D0

19

20

2

1

R0

VCC

CLK0

D1

D0

CLK1

R1

CLK

D

S

R

Q

CLK

D

R

S

Q

MC100LVEL29

DC CHARACTERISTICS (VEE = –3.0V to –3.8V; VCC = GND)

–40

°C

0

°C

25

°C

85

°C

Symbol

Characteristic

Min

Typ

Max

Min

Typ

Max

Min

Typ

Max

Min

Typ

Max

Unit

IEE

Power Supply Current

35

50

35

50

35

50

35

50

mA

VBB

Output Reference Voltage

–1.38

–1.26

–1.38

–1.26

–1.38

–1.26

–1.38

–1.26

V

IIH

Input HIGH Current

150

µA

IIL

Input LOW Current

Dn Inputs

0.5

–300

0.5

–300

0.5

–300

0.5

–300

µA

MC100LVEL29

MC100EL29

R

L

H

L

H

TRUTH TABLE

S

L

H

D

L

H

X

CLK

Z

X

Q

L

H

L

H

Undef

Z = LOW to HIGH Transition

DW SUFFIX

PLASTIC SOIC PACKAGE

CASE 751D–04

1

20

Q

H

L

H

L

Undef

PIN NAMES

Function

Data Inputs

Reset Inputs

Clock Inputs

Set Inputs

Pins

D0–D1

R0–R1

CLK0–CLK1

S0–S1

类似零件编号 - MC100EL29

制造商	部件名	数据表	功能描述
ON Semiconductor	MC100EL29	116Kb / 6P	5V ECL Dual Differential Data and Clock D Flip?묯lop With Set and Reset October, 2006 ??Rev. 4
	MC100EL29DW	116Kb / 6P	5V ECL Dual Differential Data and Clock D Flip?묯lop With Set and Reset October, 2006 ??Rev. 4
	MC100EL29DWG	116Kb / 6P	5V ECL Dual Differential Data and Clock D Flip?묯lop With Set and Reset October, 2006 ??Rev. 4
	MC100EL29DWR2	116Kb / 6P	5V ECL Dual Differential Data and Clock D Flip?묯lop With Set and Reset October, 2006 ??Rev. 4
	MC100EL29DWR2G	116Kb / 6P	5V ECL Dual Differential Data and Clock D Flip?묯lop With Set and Reset October, 2006 ??Rev. 4

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类似说明 - MC100EL29

制造商	部件名	数据表	功能描述
ON Semiconductor	MC10EP29	111Kb / 10P	ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset April, 2014 ??Rev. 9
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ON Semiconductor	MC10EP29	73Kb / 8P	3.3V / 5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset September, 2002 ??Rev. 2
Micrel Semiconductor	SY100EL29V	65Kb / 4P	5V/3.3V DUAL DIFFERENTIAL DATA AND CLOCK D FLIP-FLOP w/SET AND RESET
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