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CS18LV02565PC-55 Datasheet(数据表) 2 Page - List of Unclassifed Manufacturers

部件型号  CS18LV02565PC-55
说明  HIGH SPEED SUPER LOW POWER SRAM
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制造商  ETC1 [List of Unclassifed Manufacturers]
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CS18LV02565PC-55 Datasheet(HTML) 2 Page - List of Unclassifed Manufacturers

 
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High Speed Super Low Power SRAM
32K-Word By 8 Bit
CS18LV02565
2
Rev. 2.0
Chiplus reserves the right to change product or specification without notice.
GENERAL DESCRIPTION
The CS18LV02565 is a high performance, high speed and super low power CMOS Static Random
Access Memory organized as 32,768 words by 8bits and operates for a single 4.5 to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both high speed, super low power features
and maximum access time of 55/70ns in 5.0V operation. Easy memory expansion is provided by an
active LOW chip enable (/CE) and active LOW output enable (/OE).
The CS18LV02565 has an automatic power down feature, reducing the power consumption
significantly when chip is deselected. The CS18LV02565 is available in JEDEC standard 28-pin TSOP I
(8x13.4 mm), SOP (330 mil) and PDIP (600 mil) packages.
FEATURES
Wide operation voltage : 4.5 ~ 5.5V
Ultra low power consumption : 2mA@1MHz (Max.) , Vcc=5.0V.
1.0 uA (Typ.) CMOS standby current
High speed access time : 55/70ns.
Automatic power down when chip is deselected.
Three state outputs and TTL compatible.
Data retention supply voltage as low as 1.5V.
Easy expansion with /CE and /OE options.
PRODUCT FAMILY
Product Family
Operating Temp.
Vcc Range
Speed (ns)
Standby Current(Typ.)
ICCSB1
Package Type
28 SOP
28 TSOP I
28 PDIP
0~70
oC
55/70
1.0 uA
(Vcc = 5.0V)
Dice
28 SOP
28 TSOP I
28 PDIP
CS18LV02565
-40~85
oC
4.5~5.5V
55/70
1.5 uA
(Vcc= 5.0V)
Dice




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