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LXT975 数据表(PDF) 4 Page - Intel Corporation

部件名 LXT975
功能描述  Fast Ethernet 10/100 Quad Transceivers
Download  74 Pages
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制造商  INTEL [Intel Corporation]
网页  http://www.intel.com
标志 INTEL - Intel Corporation

LXT975 数据表(HTML) 4 Page - Intel Corporation

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LXT974/LXT975 — Fast Ethernet 10/100 Quad Transceivers
4
Datasheet
2.7.2
Per Port LEDs ........................................................................................ 38
2.7.2.1 LEDn_0 ..................................................................................... 38
2.7.2.2 LEDn_1 ..................................................................................... 38
2.7.2.3 LEDn_2 ..................................................................................... 38
2.8
Operating Requirements ..................................................................................... 39
2.8.1
Power Requirements.............................................................................. 39
2.8.1.1 MII Power Requirements........................................................... 39
2.8.1.2 Low-Voltage Fault Detect .......................................................... 39
2.8.1.3 Power Down Mode .................................................................... 39
2.8.2
Clock Requirements ............................................................................... 39
3.0
Application Information......................................................................................... 40
3.1
Design Recommendations .................................................................................. 40
3.1.1
General Design Guidelines .................................................................... 40
3.1.2
Power Supply Filtering ........................................................................... 40
3.1.2.1 Ground Noise ............................................................................ 41
3.1.3
Power and Ground Plane Layout Considerations .................................. 41
3.1.3.1 Chassis Ground......................................................................... 41
3.1.4
MII Terminations .................................................................................... 41
3.1.5
The RBIAS Pin ....................................................................................... 42
3.1.6
The Twisted-Pair Interface ..................................................................... 42
3.1.7
The Fiber Interface ................................................................................. 42
3.2
Magnetics Information ......................................................................................... 43
3.2.1
Magnetics With Improved Return Loss Performance............................. 43
3.3
Twisted-Pair/ RJ-45 Interface.............................................................................. 44
4.0
Test Specifications.................................................................................................. 50
5.0
Register Definitions ................................................................................................ 63
6.0
Package Specification............................................................................................ 73


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