KMM372V400CS datasheet(6/19 Pages) SAMSUNG

部件名	KMM372V400CS

功能描述	4M x 72 DRAM DIMM with ECC using 4Mx4, 4K 2K Refresh, 3.3V

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制造商	SAMSUNG [Samsung semiconductor]

网页	http://www.samsung.com/Products/Semiconductor

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DRAM MODULE

KMM372V410CK/CS

KMM372V400CK/CS

NOTES

An initial pause of 200us is required after power-up followed

by any 8 RAS-only or CAS-before-RAS refresh cycles before

proper device operation is achieved.

Input voltage levels are Vih/Vil. VIH(min) and VIL(max) are ref-

erence levels for measuring timing of input signals. Transition

times are measured between VIH(min) and VIL(max) and are

assumed to be 5ns for all inputs.

Measured with a load equivalent to 1TTL loads and 100pF.

Voh=2.0V and Vol=0.8V.

Operation within the

tRCD(max) limit insures that tRAC(max)

can be met.

tRCD(max) is specified as a reference point only.

If

tRCD is greater than the specified tRCD(max) limit, then

access time is controlled exclusively by

tCAC.

Assumes that

tRCD

≥tRCD(max).

This parameter defines the time at which the output achieves

the open circuit condition and is not referenced to VOH or VOL.

tWCS is not restrictive operating parameter. It included in the

data sheet as electrical characteristic only. If

tWCS

≥tWCS(min)

the cycle is an early write cycle and the data out pin will

remain high impedance for the duration of the cycle.

Either

tRCH or tRRH must be satisfied for a read cycle.

These parameters are referenced to the CAS leading edge in

early write cycles.

Operation within the

tRAD(max) limit insures that tRAC(max)

can be met.

tRAD(max) is specified as reference point only. If

tRAD is greater than the specified tRAD(max) limit, then access

time is controlled by

tAA.

The timing skew from the DRAM to the DIMM resulted from

the addition of buffers.

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3.

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类似零件编号 - KMM372V400CS

制造商	部件名	数据表	功能描述
Samsung semiconductor	KMM372V404BS	417Kb / 19P	4M x 72 DRAM DIMM with ECC using 4Mx16, 4Mx4 4K Refresh, 3.3V

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类似说明 - KMM372V400CS

制造商	部件名	数据表	功能描述
Samsung semiconductor	KMM372F410CS	456Kb / 20P	4M x 72 DRAM DIMM with ECC using 4Mx4, 4K 2K Refresh, 3.3V
	KMM372C410CK	411Kb / 19P	4M x 72 DRAM DIMM with ECC using 4Mx4, 4K 2K Refresh, 5V
	KMM372V404BS	417Kb / 19P	4M x 72 DRAM DIMM with ECC using 4Mx16, 4Mx4 4K Refresh, 3.3V
	KMM372F804BS	483Kb / 20P	8M x 72 DRAM DIMM with ECC using 4Mx16, 4Mx4 4K Refresh, 3.3V
	KMM372V413CS	410Kb / 19P	4M x 72 DRAM DIMM with ECC using 2Mx8, Dual Bank 2K Refresh, 3.3V
	KMM372F213CS	455Kb / 20P	2M x 72 DRAM DIMM with ECC using 2Mx8, 2K Refresh, 3.3V
	KMM372V213CS	408Kb / 19P	2M x 72 DRAM DIMM with ECC using 2Mx8, 2K Refresh, 3.3V
	KMM5324004CK	276Kb / 15P	4M x 32 DRAM SIMM using 4Mx4, 4K/2K Refresh, 5V
	KMM5324000CK	265Kb / 15P	4M x 32 DRAM SIMM using 4Mx4, 4K/2K Refresh, 5V
	KMM372F3280CS1	506Kb / 20P	32M x 72 DRAM DIMM with ECC using 16Mx4, 4K 8K Refresh, 3.3V

More results

KMM372V400CS 数据表(PDF) 6 Page - Samsung semiconductor

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