SN74CBTD3305C

DUAL FET BUS SWITCH WITH LEVEL SHIFTING

5V BUS SWITCH WITH 2V UNDERSHOOT PROTECTION

SCDS126A − SEPTEMBER 2003 − REVISED OCTOBER 2003

2

POST OFFICE BOX 655303

description/ordering information (continued)

damaging current will not backflow through the device when it is powered down. The device has isolation during

power off.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a

pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the

driver.

FUNCTION TABLE

(each bus switch)

INPUT

INPUT/OUTPUT

FUNCTION

INPUT

OE

INPUT/OUTPUT

A

FUNCTION

H

B

A port = B port

L

Z

Disconnect

logic diagram (positive logic)

1A

1OE

SW

1B

2A

2OE

SW

2B

2

1

5

7

3

6

simplified schematic, each FET switch (SW)

A

EN†

B

† EN is the internal enable signal applied to the switch.

Undershoot

Protection Circuit