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STK10C68-5C25I Datasheet(数据表) 2 Page - List of Unclassifed Manufacturers

部件型号  STK10C68-5C25I
说明  8K X 8 nvSRAM QuantumTrap CMOS Nonvolatile Static RAM
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制造商  ETC1 [List of Unclassifed Manufacturers]
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STK10C68
September 2003
2
Document Control # ML0006 rev 0.1
ABSOLUTE MAXIMUM RATINGSa
Voltage on Input Relative to Ground . . . . . . . . . . . . . .–0.5V to 7.0V
Voltage on Input Relative to VSS . . . . . . . . . . –0.6V to (VCC + 0.5V)
Voltage on DQ0-7. . . . . . . . . . . . . . . . . . . . . . –0.5V to (VCC + 0.5V)
Temperature under Bias . . . . . . . . . . . . . . . . . . . . . –55
°C to 125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . –65
°C to 150°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1W
DC Output Current (1 output at a time, 1s duration) . . . . . . . . 15mA
DC CHARACTERISTICS
(VCC = 5.0V ± 10%)
Note b: ICC
1
and ICC
3
are dependent on output loading and cycle rate. The specified values are obtained with outputs unloaded.
Note c: ICC
2
is the average current required for the duration of the STORE cycle (tSTORE ).
Note d: E
≥ VIH will not produce standby current levels until any nonvolatile cycle in progress has timed out.
AC TEST CONDITIONS
CAPACITANCEe
(T
A = 25
°C, f = 1.0MHz)
Note e: These parameters are guaranteed but not tested.
SYMBOL
PARAMETER
COMMERCIAL
INDUSTRIAL/
MILITARY
UNITS
NOTES
MIN
MAX
MIN
MAX
ICC
1
b
Average VCC Current
85
75
65
N/A
90
75
65
55
mA
mA
mA
mA
tAVAV = 25ns
tAVAV = 35ns
tAVAV = 45ns
tAVAV = 55ns
ICC
2
c
Average VCC Current during STORE
3
3
mA
All Inputs Don’t Care, VCC = max
ICC
3
b
Average VCC Current at tAVAV = 200ns
5V, 25°C, Typical
10
10
mA
W
≥ (V CC– 0.2V)
All Others Cycling, CMOS Levels
ISB
1
d
Average VCC Current
(Standby, Cycling TTL Input Levels)
27
23
20
N/A
28
24
21
20
mA
mA
mA
mA
tAVAV = 25ns, E ≥ VIH
tAVAV = 35ns, E ≥ VIH
tAVAV = 45ns, E ≥ VIH
tAVAV = 55ns, E ≥ VIH
ISB
2
d
VCC Standby Current
(Standby, Stable CMOS Input Levels)
750
1500
µA
E
≥ (V CC– 0.2V)
All Others VIN ≤ 0.2V or ≥ (VCC – 0.2V)
IILK
Input Leakage Current
±1
±1
µA
VCC = max
VIN = VSS to VCC
IOLK
Off-State Output Leakage Current
±5
±5
µA
VCC = max
VIN = VSS to VCC, E or G ≥ VIH
VIH
Input Logic “1” Voltage
2.2
VCC + .5
2.2
VCC + .5
V
All Inputs
VIL
Input Logic “0” Voltage
VSS – .5
0.8
VSS – .5
0.8
V
All Inputs
VOH
Note a: Output Logic “1” Voltage
2.4
2.4
V
IOUT =– 4mA
VOL
Output Logic “0” Voltage
0.4
0.4
V
IOUT = 8mA
TA
Operating Temperature
0
70
–40/-55
85/125
°C
Input Pulse Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 3V
Input Rise and Fall Times
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ≤ 5ns
Input and Output Timing Reference Levels . . . . . . . . . . . . . . . 1.5V
Output Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Figure 1
SYMBOL
PARAMETER
MAX
UNITS
CONDITIONS
CIN
Input Capacitance
8pF
∆V = 0 to 3V
COUT
Output Capacitance
7pF
∆V = 0 to 3V
Figure 1: AC Output Loading
480 Ohms
30 pF
255 Ohms
5.0V
INCLUDING
OUTPUT
SCOPE AND
FIXTURE
Note a: Stresses greater than those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device. This is a
stress rating only, and functional operation of the device at condi-
tions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rat-
ing conditions for extended periods may affect reliability.




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