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SC16C2550BIB48 数据表(PDF) 8 Page - NXP Semiconductors

部件名 SC16C2550BIB48
功能描述  5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
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制造商  PHILIPS [NXP Semiconductors]
网页  http://www.nxp.com
标志 PHILIPS - NXP Semiconductors

SC16C2550BIB48 数据表(HTML) 8 Page - NXP Semiconductors

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Philips Semiconductors
SC16C2550B
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
Product data
Rev. 02 — 14 December 2004
8 of 42
9397 750 14449
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
XTAL2
17
19
14
O
Output of the crystal oscillator or buffered clock. (See also XTAL1.)
Crystal oscillator output or buffered clock output. Should be left open if an
external clock is connected to XTAL1. For extended frequency operation,
this pin should be tied to VCC via a 2 kΩ resistor.
CDA,
CDB
38, 19 42, 21
40, 16
I
Carrier Detect (Active-LOW). These inputs are associated with individual
UART channels A through B. A logic 0 on this pin indicates that a carrier
has been detected by the modem for that channel.
CTSA,
CTSB
36, 25 40, 28
38, 23
I
Clear to Send (Active-LOW). These inputs are associated with individual
UART channels, A through B. A logic 0 on the CTS pin indicates the
modem or data set is ready to accept transmit data from the SC16C2550B.
Status can be tested by reading MSR[4]. This pin has no effect on the
UART’s transmit or receive operation.
DSRA,
DSRB
37, 22 41, 25
39, 20
I
Data Set Ready (Active-LOW). These inputs are associated with
individual UART channels, A through B. A logic 0 on this pin indicates the
modem or data set is powered-on and is ready for data exchange with the
UART. This pin has no effect on the UART’s transmit or receive operation.
DTRA,
DTRB
33, 34 37, 38
34, 35
O
Data Terminal REady (Active-LOW). These outputs are associated with
individual UART channels, A through B. A logic 0 on this pin indicates that
the SC16C2550B is powered-on and ready. This pin can be controlled via
the modem control register. Writing a logic 1 to MCR[0] will set the DTR
output to logic 0, enabling the modem. This pin will be a logic 1 after writing
a logic 0 to MCR[0], or after a reset. This pin has no effect on the UART’s
transmit or receive operation.
RIA, RIB
39, 23 43, 26
41, 21
I
Ring Indicator (Active-LOW). These inputs are associated with individual
UART channels, A through B. A logic 0 on this pin indicates the modem has
received a ringing signal from the telephone line. A logic 1 transition on this
input pin will generate an interrupt.
RTSA,
RTSB
32, 24 36, 27
33, 22
O
Request to Send (Active-LOW). These outputs are associated with
individual UART channels, A through B. A logic 0 on the RTS pin indicates
the transmitter has data ready and waiting to send. Writing a logic 1 in the
modem control register MCR[1] will set this pin to a logic 0, indicating data
is available. After a reset this pin will be set to a logic 1. This pin has no
effect on the UART’s transmit or receive operation.
RXA, RXB 10, 9
11, 10
5, 4
I
Receive data A, B. These inputs are associated with individual serial
channel data to the SC16C2550B receive input circuits, A-B. The RX signal
will be a logic 1 during reset, idle (no data), or when the transmitter is
disabled. During the local loop-back mode, the RX input pin is disabled and
TX data is connected to the UART RX input, internally.
TXA, TXB 11, 12 13, 14
7, 8
O
Transmit data A, B. These outputs are associated with individual serial
transmit channel data from the SC16C2550B. The TX signal will be a
logic 1 during reset, idle (no data), or when the transmitter is disabled.
During the local loop-back mode, the TX output pin is disabled and TX data
is internally connected to the UART RX input.
Table 2:
Pin description…continued
Symbol
Pin
Type Description
DIP40 PLCC44 LQFP48


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