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ALC888S-VD Datasheet(数据表) 78 Page - Realtek Semiconductor Corp.

部件型号  ALC888S-VD
说明  7.12 CHANNEL HD AUDIO CODEC WITH TWO INDEPENDENT SPDIF OUTPUTS
下载  92 Pages
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制造商  REALTEK [Realtek Semiconductor Corp.]
网页  https://www.realtek.com/en/
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ALC888S-VD Datasheet(HTML) 78 Page - Realtek Semiconductor Corp.

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ALC888S-VD
Datasheet
7.1+2 Channel HD Audio Codec with Two Independent
SPDIF Outputs
70
Track ID: JATR-2265-11
Rev. 1.2
8.45. Verb – Set EAPD Control (Verb ID=70Ch for Set)
Table 79. Verb – Set EAPD Control (Verb ID=70Ch for Set)
Set Command Format (NID=14h and 15h)
Codec Response Format
Bit [31:28]
Bit [27:20]
Bit [19:8]
Payload Bit [7:0]
Response [31:0]
CAd=X
Node ID=14h/1Bh Verb ID=70Ch Bit[1] is EAPD Control
0s
Payload in Set Commend for NID=14h (FRONT, port-D) and 1Bh (LINE2, port-E)
Bit
Description
7:3
Reserved. Written Data is Ignored.
2
L-R Swap. The ALC888S-VD does not support swapping left and right channels, written data is ignored.
1
EAPD Value.
0: EAPD pin state is low
1: EAPD pin state is high
0
Bridge Tied Load (BTL) Enable. The ALC888S-VD does not support BTL output. Written data is ignored.
Note: Pin 47 is shared by the EPAD and SPDIF-IN functions. Pin 47 will act as EAPD and reflect the set EAPD state in
payload bit[1] when pin widget SPDIF-IN is not connected via the programming configuration register. Other widgets
will ignore this verb
Codec Response
Bit
Description
31:0
0’s.




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