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RF96 数据表(PDF) 28 Page - HOPE Microelectronics CO., Ltd. |
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RF96 数据表(HTML) 28 Page - HOPE Microelectronics CO., Ltd. |
28 / 121 page Page 28 RF96/97/98 Tel: +86-755-82973805 Fax: +86-755-82973550 E-mail: sales@hoperf.com http://www.hoperf.com WIRELESS & SENSING PRELIMINARY DATASHEET Principle of Operation The principle behind the FHSS scheme is that a portion of each LoRaTM packet is transmitted on each hopping channel from a look up table of frequencies managed by the host microcontroller. After a predetermined hopping period the transmitter and receiver change to the next channel in a predefined list of hopping frequencies to continue transmission and reception of the next portion of the packet. The time which the transmission will dwell in any given channel is determined by HoppingPeriod which is an integer multiple of symbol periods: HoppingPeriod = Ts × FreqHoppingPeriod The frequency hopping transmission and reception process starts at channel 0. The preamble and header are transmitted first on channel 0. At the beginning of each transmission the interrupt the channel counter FhssPresentChannel is incremented and the interrupt signal FhssChangeChannel is generated. The new frequency must then be programmed within the hopping period to ensure it is taken into account for the next hop, the interrupt FhssChangeChannel is then to be cleared by writing a logical „1‟. FHSS Reception always starts on channel 0. The receiver waits for a valid preamble detection before starting the frequency hopping process as described above. Note that in the eventuality of header CRC corruption, the receiver will automatically request channel 0 and recommence the valid preamble detection process. Timing of Channel Updates The interrupt requesting the channel change, FhssChannelChange, is generated upon transition to the new frequency. The frequency hopping process is recapitulated in the diagram below: Figure 6. Interrupts generated in the case of successful frequency hopping communication. |
类似零件编号 - RF96 |
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类似说明 - RF96 |
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