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MC56F8366MFV60 数据表(PDF) 3 Page - Freescale Semiconductor, Inc

部件名 MC56F8366MFV60
功能描述  16-bit Digital Signal Controllers
Download  184 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

MC56F8366MFV60 数据表(HTML) 3 Page - Freescale Semiconductor, Inc

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56F8366 Technical Data, Rev. 2.0
Freescale Semiconductor
3
Preliminary
56F8366/56F8166 Block Diagram - 144 LQFP
Program Controller
and
Hardware Looping Unit
Data ALU
16 x 16 + 36 -> 36-Bit MAC
Three 16-bit Input Registers
Four 36-bit Accumulators
Address
Generation Unit
Bit
Manipulation
Unit
PLL
Clock
Generator
EXTAL
Interrupt
Controller
COP/
Watchdog
SCI1 or
GPIOD
4
External
Address Bus
Switch
2
CLKMODE
IRQA IRQB
External Data
Bus Switch
Program Memory
256K x 16 Flash
2K x 16 RAM
Boot ROM
16K x 16 Flash
Data Memory
16K x 16 Flash
16K x 16 RAM
PDB
PDB
XAB1
XAB2
XDB2
CDBR
SCI0 or
GPIOE
SPI0 or
GPIOE
IPBus Bridge (IPBB)
Integration
Module
System
P
O
R
O
S
C
Decoding
Peripherals
Peripheral
Device Selects
RW
Control
IPAB
IPWDB
IPRDB
2
System Bus
R/W Control
Memory
PAB
PAB
CDBW
CDBR
CDBW
Clock
resets
JTAG/
EOnCE
Port
Digital Reg
Analog Reg
Low Voltage
Supervisor
VCAP
VDD
VSS
VDDA
VSSA
5
47
5
2
VPP
2
OCR_DIS
RESET
EXTBOOT
EMI_MODE
RSTO
4
3
6
PWM Outputs
Fault Inputs
PWMA
Current Sense Inputs
or GPIOC
3
4
6
PWM Outputs
Fault Inputs
PWMB
Current Sense Inputs
or GPIOD
3
Quad
Timer D or
GPIOE
Quad
Timer C or
GPIOE
AD0
AD1
ADCA
2
5
Quadrature
Decoder 0 or
Quad
Timer A or
GPIOC
FlexCAN
2
4
AD0
AD1
4
4
4
Temp_Sense
Quadrature
Decoder 1 or
Quad
Timer B or
SPI1 or
GPIOC
4
CLKO
Bus Control
6
2
8
7
9
XTAL
PS / CS0 (GPIOD8)
RD
WR
D7-15 or GPIOF0-8
D0-6 or GPIOF9-15
GPIOB0 or A16
A8-15 or GPIOA0-7
A0-5 or GPIOA8-13
A6-7 or GPIOE2-3
VREF
ADCB
16-Bit
56800E Core
DS / CS1 (GPIOD9)
Control
GPIO or
EMI CS or
FlexCAN2
GPIOD1 (CS3 or CAN2_RX)
GPIOD0 (CS2 or CAN2_TX)
56F8366/56F8166 General Description
Note: Features in italics are NOT available in the 56F8166 device.
• Up to 60 MIPS at 60MHz core frequency
• DSP and MCU functionality in a unified,
C-efficient architecture
• Access up to 1MB of off-chip program and data memory
• Chip Select Logic for glueless interface to ROM and
SRAM
• 512KB of Program Flash
• 4KB of Program RAM
• 32KB of Data Flash
• 32KB of Data RAM
• 32KB of Boot Flash
• Up to two 6-channel PWM modules
• Four 4-channel, 12-bit ADCs
• Temperature Sensor
• Up to two Quadrature Decoders
• Optional On-Chip Regulator
• Up to two FlexCAN modules
• Two Serial Communication Interfaces (SCIs)
• Up to two Serial Peripheral Interfaces (SPIs)
• Up to four General Purpose Quad Timers
• Computer Operating Properly (COP) / Watchdog
• JTAG/Enhanced On-Chip Emulation (OnCE™) for
unobtrusive, real-time debugging
• Up to 62 GPIO lines
• 144-pin LQFP Package


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