6

MPC7457 Part Number Specification for the MPC74x7RXnnnnNx Series

MOTOROLA

General Parameters

General Parameters

1.5.2.2

Processor Bus AC Specifications

Table 9 provides the processor bus AC timing specifications for the MPC7457 part numbers described

herein.

At recommended operating conditions. See Table 4.

Parameter

All Speed Grades

Unit

Notes

Min

Max

Input setup times:

A[0:35], AP[0:4]

D[0:63], DP[0:7]

AACK, ARTRY, BG, CKSTP_IN, DBG, DTI[0:3], GBL,

HIT, TT[0:3], QACK, TA, TBEN, TEA, TS,

EXT_QUAL, PMON_IN, SHD[0:1], BMODE[0:1],

BMODE[0:1], BVSEL, L3VSEL

2.0

2.0

2.0

2.0

—

—

—

—

ns

8

Input hold times:

A[0:35], AP[0:4]

D[0:63], DP[0:7]

AACK, ARTRY, BG, CKSTP_IN, DBG, DTI[0:3], GBL,

HIT, TT[0:3], QACK, TA, TBEN, TEA, TS,

EXT_QUAL, PMON_IN, SHD[0:1]

BMODE[0:1], BVSEL, L3VSEL

0

0

0

0

—

—

—

—

ns

8

Output valid times:

A[0:35], AP[0:4]

D[0:63], DP[0:7]

AACK, ARTRY, BR, CI, CKSTP_IN, DRDY, DTI[0:3],

GBL, PMON_OUT, QREQ, TBST, TSIZ[0:2], TT[0:3],

TS, SHD[0:1], WT

—

—

—

2.0

2.0

2.0

ns

Output hold times:

A[0:35], AP[0:4]

D[0:63], DP[0:7]

AACK, ARTRY, BR, CI, CKSTP_IN, DRDY, DTI[0:3],

GBL, PMON_OUT, QREQ, TBST, TSIZ[0:2], TT[0:3],

TS, SHD[0:1], WT

0.5

0.5

0.5

—

—

—

ns

SYSCLK to output enable

0.5

—

ns

SYSCLK to output high impedance (all except TS, ARTRY,

SHD0, SHD1)

—

3.5

ns

SYSCLK to TS high impedance after precharge

—1

3, 4, 5

Maximum delay to ARTRY/SHD0/SHD1 precharge

—1

3, 5,

6, 7

Freescale Semiconductor, Inc.

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