 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
SMH4042AGBKM 数据表(PDF) 10 Page - Summit Microelectronics, Inc. |
|
||||||||||||||||||||||||||||||
SMH4042AGBKM 数据表(HTML) 10 Page - Summit Microelectronics, Inc. |
|
|
10 / 28 page  10 SMH4042A 2070 9.1 5/27/03 SUMMIT MICROELECTRONICS, Inc. Figure 4. Host-Initiated Reset Timing Over-current Circuit Breaker The SMH4042A provides a circuit breaker function to protect against short circuit conditions or exceeding the supply limits. By placing a series resistor between the host supply and the CBI pins, the breakers will trip whenever the voltage drop across the series resistor is greater than 50mV for more than 16µs. The over-current detection circuit was designed to maxi- mize protection while minimizing false alarms. The most critical period of time is during the power-on sequence when the backend circuits are first being energized. If the card has a faulty component or shorted traces, the time to shut off should be minimal. However, if the board has been operational for a long period of time the likelihood of a catastrophic failure occurring is quite low. Therefore, the SMH4042A employs two different sampling schemes. During power-up the device will sample the current every 500ns. If eight consecutive over-current conditions are detected the VGATE outputs will immediately be shut down. This provides an effective response time of 4µs. During normal operation, after the FETs have been turned on, the sampling rate will be adjusted to 2µs, thus providing an effective response time of 16µs. Also see Figure 3. RESET CONTROL While in the power sequencing mode, the reset outputs are the last to be released. When they are released all conditions of a successful power-up sequence must have been met: 1) VCC and HST_3V_MON are at or above their respec- tive VTRIP levels; 2) BD_SEL# inputs are low; 3) CARD_3V_MON and CARD_5V_MON are at or above their respective trip levels; 4) PWR_EN is high; and 5) PCI_RST is high. The PCI-RST# input must be high for the reset outputs to be released. Assuming all of the conditions listed above have been met and PCI_RST# is high and tPURST has expired, a low input of greater than 40ns duration on the PCI_RST# input will initiate a reset cycle. The duration of the reset cycle will be determined by the PCI_RST# input. If PCI_RST# low is shorter than tPURST, the reset outputs will be driven active for tPURST. If PCI_RST# is longer than tPURST the reset outputs will remain active until PCI_RST# is released. Also see Figure 4. LOCAL_PCI_RST# tPURST 2070 Fig04 LOCAL_PCI_RST PCI_RST# tPRLPR tPURST |
类似零件编号 - SMH4042AGBKM |
|
类似说明 - SMH4042AGBKM |
|
|
|
链接网址 |
| 隐私政策 |
| ALLDATASHEETCN.COM |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
