ISL26311 datasheet(7/23 Pages) RENESAS

部件名	ISL26311

功能描述	12-bit, 125kSPS Low-power ADCs with Single-ended and Differential Inputs and Multiple Input Channels

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制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

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7 / 23 page

ISL26310, ISL26311, ISL26312, ISL26313, ISL26314, ISL26315, ISL26319

FN7549 Rev 3.00

Page 7 of 23

August 18, 2015

PSRR

Power Supply Rejection Ratio

70

dB

DYNAMIC PERFORMANCE

SNR

Signal-to-Noise

Notes: VIN = FS - 0.1dB, fIN = 10kHz

Differential Inputs

73.4

dB

Single-Ended Inputs

73.4

dB

SINAD

Signal-to-Noise + Distortion

Notes: VIN = FS - 0.1dB, fIN = 10kHz

Differential Inputs

73.1

dB

Single-Ended Inputs

73.1

dB

THD

Total Harmonic Distortion

Notes: VIN = FS - 0.1dB, fIN = 10kHz

Differential Inputs

-86

dB

Single-Ended Inputs

-86

dB

SFDR

Spurious-free Dynamic Range

Notes: VIN = FS - 0.1dB

fIN = 20kHz

96

dB

BW

-3dB Input Bandwidth

2.5

MHz

tAD

Sampling Aperture Delay

12

ns

tjit

Sampling Aperture Jitter

25

ps

POWER SUPPLY REQUIREMENTS

VDD

Supply Voltage

2.7

5.25

V

IDD

Supply Current

2.2

3

mA

PD

Power Consumption

Normal Operation

11

15

mW

IPD

Power-down Current

Auto Power-Down Mode

8

50

µA

Istby

Standby Mode Current

Auto Sleep Mode

0.4

mA

DIGITAL INPUTS

VIH

0.7 VDD

V

VIL

0.2 VDD

V

VOH

IOH = -1mA

VDD-0.4

V

VOL

IOL = 1mA

0.2 VDD

V

IIH, IIL

Input Leakage Current

-100

100

nA

Serial Clock Frequency

20

MHz

TIMING SPECIFICATIONS (Note 7)

tSCLK

SCLK Period (in RAC Mode)

50

ns

tSCLK

SCLK Period (in RSC, RDC Modes)

50

200

ns

tDATA

Safe Data Transfer Time After Conversion

State Begins

3.2

µs

tCSB_SCLK CSB Falling Low to SCLK Rising Edge

40

ns

tSDI_SU SDI Setup Time with Respect to Positive

Edge of SCLK

10

ns

tSDI_H

SDI Hold Time with Respect to Positive

Edge of SCLK

10

ns

tSDO_V

SDOUT Valid Time with Respect to

Negative Edge of SCLK

25

ns

tSDOZ_D SDOUT to High Impedance State After CNV

Rising Edge (or last SCLK falling edge)

(Note 8)

85

ns

tACQ

Acquisition Time when Fully Powered Up

800

ns

tACQ

Acquisition Time in Auto Sleep Mode

2.1

µs

Electrical Specifications VREF = VDD V, VDD = 2.7V to 5V, VCM = VDD/2, SCLK = 20MHz and TA = -40°C to +125°C (typical performance

at +25°C), unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C. (Continued)

SYMBOL

PARAMETER

TEST LEVEL OR NOTES

MIN

(Note 6)

TYP

MAX

(Note 6)

UNITS

类似零件编号 - ISL26311

制造商	部件名	数据表	功能描述
Intersil Corporation	ISL26311	818Kb / 23P	12-bit, 125kSPS Low-power ADCs with Single-ended and Differential Inputs and Multiple Input Channels
Renesas Technology Corp	ISL26311	1Mb / 23P	12-Bit, 250kSPS Low-Power ADCs with Single-Ended and Differential Inputs and Multiple Input Channels
Intersil Corporation	ISL26311FBZ	818Kb / 23P	12-bit, 125kSPS Low-power ADCs with Single-ended and Differential Inputs and Multiple Input Channels
Intersil Corporation	ISL26311FBZ	9Mb / 44P	Providing high-performance solutions for every link in the signal chain

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