数据搜索系统,热门电子元器件搜索 |
|
ADC0804 数据表(PDF) 2 Page - Renesas Technology Corp |
|
ADC0804 数据表(HTML) 2 Page - Renesas Technology Corp |
2 / 17 page ADC0803, ADC0804 FN3094 Rev 4.00 Page 2 of 17 August 2002 Functional Diagram 12 11 15 14 13 18 17 16 WR RD CS INTR CLK OSC CLK R V+ VIN (-) VIN (+) DGND VREF/2 AGND (VREF) DAC VOUT COMP CLK GEN CLKS CLK A RESET START F/F LADDER AND DECODER SUCCESSIVE APPROX. REGISTER AND LATCH 8-BIT SHIFT REGISTER D RESET SET CONV. COMPL. THREE-STATE OUTPUT LATCHES DIGITAL OUTPUTS THREE-STATE CONTROL “1” = OUTPUT ENABLE DFF2 CLK A XFER G2 Q 8 X 1/f R Q INTR F/F IF RESET = “0” D DFF1 Q D Q CLK B START CONVERSION MSB LSB Q “1” = RESET SHIFT REGISTER “0” = BUSY AND RESET STATE RESET READ SET 3 2 1 5 7 6 10 9 8 4 19 20 CLK IN MSB G1 CLK - + LSB INPUT PROTECTION FOR ALL LOGIC INPUTS INPUT TO INTERNAL BV = 30V CIRCUITS V+ + - |
类似零件编号 - ADC0804 |
|
类似说明 - ADC0804 |
|
|
链接网址 |
隐私政策 |
ALLDATASHEETCN.COM |
ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |