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M27C512-80N1 数据表(PDF) 7 Page - STMicroelectronics

部件名 M27C512-80N1
功能描述  512 Kbit (64K x8) UV EPROM and OTP EPROM
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M27C512-80N1 数据表(HTML) 7 Page - STMicroelectronics

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M27C512
tion, a 4.7µF bulk electrolytic capacitor should be
used between VCC and VSS for every eight devic-
es. The bulk capacitor should be located near the
power supply connection point.The purpose of the
bulk capacitor is to overcome the voltage drop
caused by the inductive effects of PCB traces.
Figure 6. Programming Flowchart
Programming
When delivered (and after each erasure for UV
EPROM), all bits of the M27C512 are in the '1'
state. Data is introduced by selectively program-
ming '0's into the desired bit locations. Although
only '0's will be programmed, both '1's and '0's can
be present in the data word. The only way to
change a '0' to a '1' is by die exposure to ultraviolet
light (UV EPROM). The M27C512 is in the pro-
gramming mode when VPP input is at 12.75V and
E is pulsed to VIL. The data to be programmed is
applied to 8 bits in parallel to the data output pins.
The levels required for the address and data in-
puts are TTL. VCC is specified to be 6.25V ±
0.25V. The M27C512 can use PRESTO IIB Pro-
gramming Algorithm that drastically reduces the
programming time (typically less than 6 seconds).
Nevertheless to achieve compatibility with all pro-
gramming equipments, PRESTO Programming
Algorithm can be used as well.
PRESTO IIB Programming Algorithm
PRESTO IIB Programming Algorithm allows the
whole array to be programmed with a guaranteed
margin, in a typical time of 6.5 seconds. This can
be achieved with STMicroelectronics M27C512
due to several design innovations described in the
M27C512 datasheet to improve programming effi-
ciency and to provide adequate margin for reliabil-
ity. Before starting the programming the internal
MARGIN MODE circuit is set in order to guarantee
that each cell is programmed with enough margin.
Then a sequence of 100µs program pulses are ap-
plied to each byte until a correct verify occurs. No
overprogram pulses are applied since the verify in
MARGIN MODE provides the necessary margin.
Program Inhibit
Programming of multiple M27C512s in parallel
with different data is also easily accomplished. Ex-
cept for E, all like inputs including GVPP of the par-
allel M27C512 may be common. A TTL low level
pulse applied to a M27C512's E input, with VPP at
12.75V, will program that M27C512. A high level E
input inhibits the other M27C512s from being pro-
grammed.
Program Verify
A verify (read) should be performed on the pro-
grammed bits to determine that they were correct-
ly programmed. The verify is accomplished with G
at VIL. Data should be verified with tELQV after the
falling edge of E.
Electronic Signature
The Electronic Signature (ES) mode allows the
reading out of a binary code from an EPROM that
will identify its manufacturer and type. This mode
is intended for use by programming equipment to
automatically match the device to be programmed
with its corresponding programming algorithm.
The ES mode is functional in the 25°C ± 5°C am-
bient temperature range that is required when pro-
gramming the M27C512. To activate the ES
mode, the programming equipment must force
11.5V to 12.5V on address line A9 of the
M27C512. Two identifier bytes may then be se-
quenced from the device outputs by toggling ad-
dress line A0 from VIL to VIH. All other address
lines must be held at VIL during Electronic Signa-
ture mode. Byte 0 (A0 = VIL) represents the man-
ufacturer code and byte 1 (A0 = VIH) the device
identifier
code.
For
the
STMicroelectronics
M27C512, these two identifier bytes are given in
Table 3. and can be read-out on outputs Q7 to Q0.
AI00738B
n = 0
Last
Addr
VERIFY
E = 100
µs Pulse
++n
= 25
++ Addr
VCC = 6.25V, VPP = 12.75V
FAIL
CHECK ALL BYTES
1st: VCC = 6V
2nd: VCC = 4.2V
YES
NO
YES
NO
YES
NO
SET MARGIN MODE
RESET MARGIN MODE


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