MC10EP446, MC100EP446

http://onsemi.com

9

−40

°C

25

°C

85

°C

Symbol

Characteristic

Min

Typ

Max

Min

Typ

Max

Min

Typ

Max

Unit

Maximum Frequency

(Figure 14)

CKSEL High

CKSEL Low

3.2

1.6

3.4

1.7

3.2

1.6

3.4

1.7

3.2

1.6

3.4

1.7

GHz

Propagation Delay to Output Differential

CKSEL = 0

CLK TO PCLK

650

700

750

800

850

900

700

750

800

850

900

950

725

775

850

900

975

1025

ps

CKSEL = 1

CLK TO PCLK

775

850

875

950

975

1050

825

900

925

1000

1025

1100

875

950

1000

1075

1125

1200

ps

Setup Time

D to CLK+

(Figure 3)

SYNC− to CLK−

(Figure 4)

CKEN+ to CLK−

(Figure 5)

−375

200

70

−425

140

40

−400

200

70

−450

140

40

−450

200

70

−500

140

40

ps

Hold Time

D to CLK+

(Figure 3)

SYNC− to CLK−

CLK− to CKEN−

(Figure 5)

−525

0

75

−575

45

−550

0

75

−600

45

−600

0

75

−650

45

ps

Minimum Pulse Width (Note 22)

Data (D0−D7)

SYNC

CKEN

150

200

145

150

200

145

150

200

145

ps

Random Clock Jitter (RMS)

0.2

< 1

0.2

< 1

0.2

< 1

ps

Input Differential Voltage Swing

(Note 21)

150

800

1200

150

800

1200

150

800

1200

mV

Output Rise/Fall Times

(20% − 80%)

50

100

150

70

120

170

90

140

190

ps

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit

values are applied individually under normal operating conditions and not valid simultaneously.

20. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50

22. The minimum pulse width is valid only if the setup and hold times are respected.