S34ML01G1 Datasheet(数据表) 19 Page - Cypress Semiconductor
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S34ML01G1 Datasheet(HTML) 19 Page - Cypress Semiconductor
Document Number: 002-00676 Rev. *V
Page 19 of 71
If a Copy Back Program operation is interrupted by hardware reset, power failure or other means, the host must ensure that the
interrupted page is not used for further reading or programming operations until the next uninterrupted block erase is complete.
Multiplane Copy Back Program — S34ML02G1 and S34ML04G1
The device supports Multiplane Copy Back Program with exactly the same sequence and limitations as the Page Program.
Multiplane Copy Back Program must be preceded by two single page Copy Back Read command sequences (1st page must be
read from the 1st plane and 2nd page from the 2nd plane).
Multiplane Copy Back cannot cross plane boundaries — the contents of the source page of one device plane can be copied only to
a destination page of the same plane. EDC check is available also for Multiplane Copy Back Program only for S34ML02G1 and
When “EDC check” is used in copy back, it must comply with some limitations related to data handling during one Multiplane Copy
Back Program sequence. Please refer to Section 3.8 on page 19 for details on EDC operation. The Multiplane Copy Back Program
sequence represented in Figure 29 on page 47 shows the legacy protocol. In this case, the block address bits for the first plane are
all zero and the second address issued selects the block for both planes. Figure 30 on page 47 describes the sequence using the
ONFI protocol. For both addresses issued in this protocol, the block address bits must be the same except for the bit(s) that select
If a Multiplane Copy Back Program operation is interrupted by hardware reset, power failure or other means, the host must ensure
that the interrupted pages are not used for further reading or programming operations until the next uninterrupted block erases are
complete for the applicable blocks.
Special Read for Copy Back — S34ML02G1 and S34ML04G1
The S34ML02G1 and S34ML04G1 devices support Special Read for Copy Back. If Copy Back Read (described in Section 3.7 and
Section 3.7.1 on page 19) is triggered with confirm command ‘36h’ instead ‘35h’, Copy Back Read from target page(s) will be
executed with an increased internal (V
This special feature is used in order to minimize the number of read errors due to over-program or read disturb — it shall be used
only if ECC read errors have occurred in the source page using Page Read or Copy Back Read sequences.
Excluding the Copy Back Read confirm command, all other features described in Section 3.7 and Section 3.7.1 for standard copy
back remain valid (including the figures referred to in those sections).
EDC Operation — S34ML02G1 and S34ML04G1
Error Detection Code check is a feature that can be used during the copy back operation (both single and multiplane) to detect
single bit errors occurring in the source page(s).
Note: The S34ML01G1 device does not support EDC.
EDC check allows detection of up to 1 single bit error every 528 bytes, where each 528 byte group is composed of 512
bytes of main array and 16 bytes of spare area (see Table 10 and Table 11 on page 21). The described 528-byte area is
called an “EDC unit.”
In the ×16 device, EDC allows detection of up to 1 single bit error every 264 words, where each 264 word group is
composed by 256 words of main array and 8 words of spare area see Table 10 and Table 11 on page 21). The described
264-word area is called
EDC results can be checked through a specific Read EDC register command, available only after issuing a Copy Back Program or a
Multiplane Copy Back Program. The EDC register can be queried during the copy back program busy time (t
For the “EDC check” feature to operate correctly, specific conditions on data input handling apply for program operations.
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