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S34ML01G1 Datasheet(数据表) 53 Page - Cypress Semiconductor

部件型号  S34ML01G1
说明  1 Gb/2 Gb/4 Gb, 3 V, SLC NAND Flash for Embedded
下载  71 Pages
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制造商  CYPRESS [Cypress Semiconductor]
网页  http://www.cypress.com
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S34ML01G1 Datasheet(HTML) 53 Page - Cypress Semiconductor

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Document Number: 002-00676 Rev. *V
Page 53 of 71
S34ML01G1
S34ML02G1
S34ML04G1
6.25
Read ID Operation Timing
Figure 41. Read ID Operation Timing
6.26
Read ID2 Operation Timing
Figure 42. Read ID2 Operation Timing
Notes
76. 4-cycle address is shown for the S34ML01G1. For S34ML02G1 and S34ML04G1, insert an additional address cycle of 00h.
77. If Status Register polling is used to determine completion of the Read ID2 operation, the Read Command (00h) must be issued before ID2 data can be read from the flash.
CE#
WE#
CLE
RE#
ALE
tWHR
tAR
tREA
I/Ox
01h
F1h
00h
1Dh
1 Gb Device
I/Ox
01h
DAh
90h
95h
2 Gb Device
44h
I/Ox
01h
DCh
90h
95h
4 Gb Device
54h
Read ID
Command
Address 1
Cycle
Maker
Code
Device
Code
3rd Cycle
4th Cycle
5th Cycle
90h
90h
09h
00h
00h
00h
90
CE#
WE#
CLE
RE#
ALE
tR
Read ID2
Commands
4 Cycle Address
1st Cycle
2nd Cycle
3rd Cycle
4th Cycle
5th Cycle
I/Ox
Read ID2
Confirm
Command
30h 65h
00h 00h
02h 02h
00h 30h
ID2 Data
ID2 Data
ID2 Data
ID2 Data
ID2 Data
R/B#
Busy
(Note 76)




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