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S34ML01G1 Datasheet(数据表) 52 Page - Cypress Semiconductor

部件型号  S34ML01G1
说明  1 Gb/2 Gb/4 Gb, 3 V, SLC NAND Flash for Embedded
下载  71 Pages
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制造商  CYPRESS [Cypress Semiconductor]
网页  http://www.cypress.com
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S34ML01G1 Datasheet(HTML) 52 Page - Cypress Semiconductor

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 52 page
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Document Number: 002-00676 Rev. *V
Page 52 of 71
S34ML01G1
S34ML02G1
S34ML04G1
Figure 40. Multiplane Cache Program (ONFI 1.0 Protocol)
Notes
74. The block address bits must be the same except for the bit(s) that select the plane.
75. Read Status register (70h) is used in the figure. Read Status Enhanced (78h) can be also used.
CLE
ALE
CE#
RE#
R/B#
IOx
WE#
Column Address
Row Address
tWB
tWC
Column Address
Row Address
tCBSYW
1
1
CLE
ALE
CE#
RE#
R/B#
IOx
WE#
tDBSY
11h
Din
N
Din
M
80h
Col.
Add1
Col.
Add2
Row
Add1
Row
Add2
Row
Add3
80h
Col.
Add1
Col.
Add2
Row
Add1
Row
Add2
Row
Add3
15h
Din
N
Din
M
Column Address
Row Address
tWC
Column Address
Row Address
tPROG
tDBSY
11h
Din
N
Din
M
80h
Col.
Add1
Col.
Add2
Row
Add1
Row
Add2
Row
Add3
80h
Col.
Add1
Col.
Add2
Row
Add1
Row
Add2
Row
Add3
10h
Din
N
Din
M
tWB
tADL
tADL
tWB
Status
70h
80h
Address Input
Data Input
11h
80h
Address Input
Data Input
15h
Command Input
tDBSY
Return to 1
Repeat a max of 63 times
80h
Address Input
Data Input
11h
80h
Address Input
Data Input
10h
Command Input
tDBSY
tPROG
tCBSYW
RY/BY#
RY/BY#
1
1




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