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S34ML01G1 Datasheet(数据表) 46 Page - Cypress Semiconductor

部件型号  S34ML01G1
说明  1 Gb/2 Gb/4 Gb, 3 V, SLC NAND Flash for Embedded
下载  71 Pages
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制造商  CYPRESS [Cypress Semiconductor]
网页  http://www.cypress.com
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S34ML01G1 Datasheet(HTML) 46 Page - Cypress Semiconductor

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Document Number: 002-00676 Rev. *V
Page 46 of 71
S34ML01G1
S34ML02G1
S34ML04G1
Figure 26. Multiplane Block Erase (ONFI 1.0 Protocol)
Notes
61. R1A-R3A Row address for block on plane 0. R1A is the least significant byte.
62. R1B-R3B Row address for block on plane 1. R1B is the least significant byte.
63. The block address bits must be the same except for the bit(s) that select the plane.
6.16
Copy Back Read with Optional Data Readout
Figure 27. Copy Back Read with Optional Data Readout
6.17
Copy Back Program Operation With Random Data Input
Figure 28. Copy Back Program with Random Data Input
60h
CLE
WE#
ALE
RE#
IOx
R1A R2A R3A D1h
60h
R1B R2B
SR[6]
tIEBSY
R3B D0h
tBERS
I/O
R/B#
Busy
tR
(Read Busy time)
Busy
tPROG
(Program Busy time)
00h
Source
Add Inputs
35h
Data Outputs
85h
Target
Add Inputs
10h
70h/
7Bh
SR0/
EDC Reg
Read Status Register/
EDC Register
I/O
R/B#
Busy
tR
(Read Busy time)
Busy
tPROG
(Program Busy time)
00h
Source
Add Inputs
35h
85h
2 Cycle
Add Inputs
10h
Unlimited number of repetitions
70h
SR0
Read Status Register
85h
Target
Add Inputs
Data
Data




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