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LT1640AH 数据表(PDF) 11 Page - Linear Technology

部件名 LT1640AH
功能描述  Negative Voltage Hot Swap Controllers in SOT-23
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制造商  LINER [Linear Technology]
网页  http://www.linear.com
标志 LINER - Linear Technology

LT1640AH 数据表(HTML) 11 Page - Linear Technology

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11
4251b12f
LTC4251B/LTC4251B-1/
LTC4251B-2
SHUNT REGULATOR
A fast responding shunt regulator clamps the VIN pin to
13V (VZ). Power is derived from –48RTN by an external
current limiting resistor, RIN. A 1μF decoupling capacitor,
CIN filters supply transients and contributes a short delay
at start-up.
To meet creepage requirements RIN may be split into two
or more series connected units, such as two 5.1k or three
3.3k resistors. This introduces a wider total spacing than is
possible with a single component while at the same time
ballasting the potential across the gap under each resistor.
The LTC4251B is fundamentally a low voltage device that
operates with –48V as its reference ground. To further
protect against arc discharge into its pins, the area in
and around the LTC4251B and all associated components
should be free of any other planes such as chassis ground,
return, or secondary-side power and ground planes.
VIN is rated handle 30mA within the thermal limits of the
package, and is tested to survive a 100μs, 100mA pulse. To
protect VIN against damage from higher amplitude spikes,
clamp VIN to VEE with a 13V Zener diode. Star connect
VEE and all VEE referred components to the sense resistor
Kelvin terminal as illustrated in Figure 2, keeping trace
lengths between VIN, CIN, DIN and VEE as short as possible.
INTERNAL UNDERVOLTAGE LOCKOUT (UVLO)
Internal circuitry monitors VIN for undervoltage. The exact
thresholds are defined by VLKO and its hysteresis, VLKH.
When VIN rises above 9.2V (VLKO) the chip is enabled;
below 8.2V (VLKO-VLKH) it is disabled and GATE is pulled
low. The UVLO function at VIN should not be confused with
the UV/OV pin. These are completely separate functions.
UV/OV COMPARATORS
Two hysteretic comparators for detecting under- and
overvoltage conditions, with the following thresholds,
monitor the dual function UV/OV pin:
UV turning on at VUVHI
UV turning off at VUVLO
APPLICATIONS INFORMATION
OV turning off at VOVHI
OV turning on at VOVLO
The UV and OV trip point ratio for LTC4251B is designed to
match the standard telecom operating range of 43V to 75V.
The LTC4251B-2 implements a UV threshold of 43V only.
A divider (R1, R2) is used to scale the supply voltage. Using
R1 = 402k and R2 = 32.4k gives a typical operating range
of 43.2V to 74.4V. The under- and overvoltage shutdown
thresholds are then 39.2V and 82.5V. 1% divider resistors
are recommended to preserve threshold accuracy. The
same resistor values can be used for the LTC4251B-2.
The R1-R2 divider values shown in the Typical Application
set a standing current of slightly more than 100μA, and
define an impedance at UV/OV of 30k. In most applica-
tions, 30k impedance coupled with 300mV UV hysteresis
makes the LTC4251B/LTC4251B-1/LTC4251B-2 insensitive
to noise. If more noise immunity is desired, add a 1nF to
10nF filter capacitor from UV/OV to VEE.
The UV and OV trip point thresholds for the LTC4251B-1
are designed to encompass the standard telecom operating
range of –36V to –72V.
A divider (R1, R2) is used to scale the supply voltage.
Using R1 = 442k and R2 = 34.8k gives a typical operating
range of 33.2V to 81V. The typical under- and overvoltage
shutdown thresholds are then 29.6V and 84.5V. 1% divider
resistors are recommended to preserve threshold accuracy.
The R1-R2 divider values shown in the Typical Application
set a standing current of slightly more than 100μA, and
define an impedance at UV/OV of 32k. In most applica-
tions, 32k impedance coupled with 260mV UV hysteresis
makes the LTC4251B-1 insensitive to noise. If more noise
immunity is desired, add a 1nF to 10nF filter capacitor
from UV/OV to VEE.
UV/OV OPERATION
A low input to the UV comparator will reset the chip and
pull the GATE and TIMER pins low. A low-to-high UV
transition will initiate an initial timing sequence if the three
remaining interlock conditions are met.


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