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LTC3890-1 数据表(PDF) 21 Page - Linear Technology |
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LTC3890-1 数据表(HTML) 21 Page - Linear Technology |
21 / 38 page LTC3899 21 3899fa For more information www.linear.com/LTC3899 APPLICATIONS INFORMATION Ferrite designs have very low core loss and are preferred for high switching frequencies, so design goals can con- centrate on copper loss and preventing saturation. Ferrite core material saturates hard, which means that induc- tance collapses abruptly when the peak design current is exceeded. This results in an abrupt increase in inductor ripple current and consequent output voltage ripple. Do not allow the core to saturate! Power MOSFET and Schottky Diode (Optional) Selection Two external power MOSFETs must be selected for each controller in the LTC3899: one N-channel MOSFET for the topswitch(mainswitchforthebucks,synchronousforthe boost), and one N-channel MOSFET for the bottom switch (main switch for the boost, synchronous for the bucks). The peak-to-peak drive levels are set by the DRVCC volt- age. This voltage can range from 5V to 10V depending on configurationoftheDRVSETpin.Therefore,bothlogic-level and standard-level threshold MOSFETs can be used in most applications depending on the programmed DRVCC voltage. Pay close attention to the BVDSS specification for the MOSFETs as well. The LTC3899’s unique ability to adjust the gate drive level between 5V to 10V (OPTI-DRIVE) allows an application circuit to be precisely optimized for efficiency. When adjusting the gate drive level, the final arbiter is the total input current for the regulator. If a change is made and the input current decreases, then the efficiency has im- proved. If there is no change in input current, then there is no change in efficiency. Selection criteria for the power MOSFETs include the on-resistance RDS(ON), Miller capacitance CMILLER, input voltage and maximum output current. Miller capacitance, CMILLER, can be approximated from the gate charge curve usually provided on the MOSFET manufacturers’ data sheet. CMILLER is equal to the increase in gate charge along the horizontal axis while the curve is approximately flat divided by the specified change in VDS. This result is then multiplied by the ratio of the application applied VDS to the gate charge curve specified VDS. When the IC is operating in continuous mode the duty cycles for the top and bottom MOSFETs are given by: Buck Main Switch Duty Cycle = VOUT VIN Buck Sync Switch Duty Cycle = VIN − VOUT VIN Boost Main Switch Duty Cycle = VOUT − VIN VOUT Boost Sync Switch Duty Cycle = VIN VOUT The MOSFET power dissipations at maximum output current are given by: PMAIN_BUCK = VOUT VIN IOUT(MAX) ( )2 1+δ ( )RDS(ON)+ (VIN)2 IOUT(MAX) 2 (RDR)(CMILLER)• 1 VDRVCC − VTHMIN + 1 VTHMIN (f) PSYNC_BUCK = VIN − VOUT VIN IOUT(MAX) ( )2 1+δ ( )RDS(ON) PMAIN_BOOST = VOUT − VIN ( )VOUT VIN2 IOUT(MAX) ( )2• 1+δ ( )RDS(ON)+ VOUT3 VIN IOUT(MAX) 2 • RDR ( ) CMILLER ( )• 1 VDRVCC − VTHMIN + 1 VTHMIN (f) PSYNC_BOOST = VIN VOUT IOUT(MAX) ( )2 1+δ ( )RDS(ON) where δ is the temperature dependency of RDS(ON) and RDR (approximately 2Ω) is the effective driver resistance at the MOSFET’s Miller threshold voltage. VTHMIN is the typical MOSFET minimum threshold voltage. |
类似零件编号 - LTC3890-1 |
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类似说明 - LTC3890-1 |
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