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AUIRS1170S 数据表(PDF) 10 Page - Infineon Technologies AG |
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AUIRS1170S 数据表(HTML) 10 Page - Infineon Technologies AG |
10 / 28 page AUIRS1170S 10 Rev. 2.3 2016-09-03 Detailed Pin Description VCC: Power Supply This is the supply voltage pin of the IC and it is monitored by the under voltage lockout circuit. It is possible to turn off the IC by pulling this pin below the minimum turn off threshold voltage, without damage to the IC. To prevent noise problems, a bypass ceramic capacitor connected to Vcc and COM should be placed as close as possible to the AUIRS1170. This pin is internally clamped. SYNC: Direct Turn-off and Reset SYNC is used to directly turn-off the SR MOSFET by an external signal. The gate output of AUIRS1170 is low when SYNC voltage is higher than VSYHI threshold. The propagation delay from SYNC goes high to gate turns off is 50ns maximum. The turn-off of SYNC is a direct control and it ignores the MOT time (override). The SYNC pin will reset MOT and Blanking time when SYNC switches from low to high. It will reset MOT timer and Blanking timer only at the rising edge of signal. This function is useful for very low output voltage condition (such as overload or short circuit) where the VD voltage is too low to reach Vth3 threshold to reset the timers. SYNC pin also can be used to control the turn-on time of SR MOSFET (adding additional delay time at turn-on for noise immunity). If not used, SYNC pin should be connected to COM. MOT: Minimum On Time The MOT programming pin controls the amount of minimum on time. Once VTH2 is crossed for the first time, the gate signal will become active and turn on the power FET. Spurious ringings and oscillations can trigger the input comparator off. The MOT blanks the input comparator keeping the FET on for a minimum time. The MOT is programmed between 200ns and 3us (typ.) by using a resistor referenced to COM and can be programmed using the following formula: ���������������� = 2.5 ∗ 1010 ���������������� EN: Enable This pin is used to activate the IC “sleep” mode by pulling the voltage level below 1.6V (typ). In sleep mode the IC will consume a minimum amount of current. All switching functions will be disabled and the gate will be inactive. VD: Drain Voltage Sense VD is the voltage sense pin for the power MOSFET Drain. This is a high voltage pin and particular care must be taken in properly routing the connection to the power MOSFET drain. Additional Filtering is recommended; see application section for details. VS: Source Voltage Sense VS is the differential sense pin for the power MOSFET Source and IC gnd connection. This pin must must be connected as close as possible to the power MOSFET source pin. Good electrical connection must be done to this pin since the internal devices and gate driver are referenced to this point. VGATE: Gate Drive Output This is the gate drive output of the IC. Drive voltage is internally limited and provides 2A peak source and 7A peak sink capability. Although this pin can be directly connected to the power MOSFET gate, the use of minimal gate resistor is recommended, especially when putting multiple FETs in parallel. Care must be taken in order to keep the gate loop as short and as small as possible in order to achieve optimal switching performance. |
类似零件编号 - AUIRS1170S |
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类似说明 - AUIRS1170S |
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