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AD7451 数据表(PDF) 3 Page - Analog Devices |
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AD7451 数据表(HTML) 3 Page - Analog Devices |
3 / 15 page REV. PrC PRELIMINARY TECHNICAL DATA –3– AD7451/AD7441 Parameter Test Conditions/Comments B Version1 Units CONVERSION RATE Conversion Time 888ns with an 18MHz SCLK 16 SCLK cycles Track/Hold Acquisition Time 2 Sine Wave Input 200 ns max Step Input T B D T B D ns max Throughput Rate6 1 MSPS max POWER REQUIREMENTS V DD 2.7/5.25 Vmin/max I DD 5,7 Normal Mode(Static) SCLK On or Off 0.5 mA typ Normal Mode (Operational) VDD = 5 V. 1.8 mA max VDD = 3 V. 1.25 mA max Full Power-Down Mode SCLK On or Off 1 µA max Power Dissipation Normal Mode (Operational) VDD =5 V. 9 mW max VDD =3 V. 3.75 mW max Full Power-Down VDD =5 V. SCLK On or Off 5 µW max VDD =3 V. SCLK On or Off 3 µW max NOTES 1Temperature ranges as follows: B Versions: –40°C to +85°C. 2See ‘Terminology’ section. 3 A small DC input is applied to V IN- to provide a pseudo ground for VIN+ 4Sample tested @ +25°C to ensure compliance. 5See POWER VERSUS THROUGHPUT RATE section. 6See ‘Serial Interface Section’. 7Measured with a midscale DC input. Specifications subject to change without notice. AD7451 - SPECIFICATIONS1 |
类似零件编号 - AD7451 |
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类似说明 - AD7451 |
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