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S29GL01GP 数据表(PDF) 15 Page - Cypress Semiconductor

部件名 S29GL01GP
功能描述  1 Gbit, 512, 256, 128 Mbit, 3 V, Page Flash with 90 nm MirrorBit Process Technology
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制造商  CYPRESS [Cypress Semiconductor]
网页  http://www.cypress.com
标志 CYPRESS - Cypress Semiconductor

S29GL01GP 数据表(HTML) 15 Page - Cypress Semiconductor

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Document Number: 002-00886 Rev. *B
Page 15 of 83
S29GL01GP
S29GL512P
S29GL256P
S29GL128P
7.
Device Operations
This section describes the read, program, erase, handshaking, and reset features of the Flash devices.
Operations are initiated by writing specific commands or a sequence with specific address and data patterns into the command
registers (see Table through Table ). The command register itself does not occupy any addressable memory location; rather, it is
composed of latches that store the commands, along with the address and data information needed to execute the command. The
contents of the register serve as input to the internal state machine and the state machine outputs dictate the function of the device.
Writing incorrect address and data values or writing them in an improper sequence may place the device in an unknown state, in
which case the system must pull the RESET# pin low or power cycle the device to return the device to the reading array data mode.
7.1
Device Operation Table
The device must be setup appropriately for each operation. Table describes the required state of each control pin for any particular
operation.
L
egend
L = Logic Low = VIL, H = Logic High = VIH, VHH = 11.5–12.5V, X = Don’t Care, AIN = Address In, DIN = Data In, DOUT = Data Out
Notes
1. Addresses are AMax:A0 in word mode; AMax:A-1 in byte mode.
2. If WP# = VIL, on the outermost sector remains protected. If WP# = VIH, the outermost sector is unprotected. WP# has an internal pull-up; when
unconnected, WP# is at VIH. All sectors are unprotected when shipped from the factory (The Secured Silicon Sector can be factory protected
depending on version ordered.)
3. DIN or DOUT as required by command sequence, data polling, or sector protect algorithm.
Device Operations
Operation
CE#
OE#
WE#
RESET#
WP#/ACC
Addresses
(Note 1)
DQ0–DQ7
DQ8–DQ15
BYTE#= VIH BYTE#= VIL
Read
L
L
H
H
X
AIN
DOUT
DOUT
DQ8–DQ14
= High-Z,
DQ15 = A-1
Write (Program/
Erase)
LH
L
H
(Note 2)
AIN
(Note 3)
(Note 3)
Accelerated Program
L
H
L
H
VHH
AIN
(Note 3)
(Note 3)
Standby
VCC ± 0.3
V
XX
VCC ± 0.3
V
H
X
High-Z
High-Z
High-Z
Output Disable
L
H
H
H
X
X
High-Z
High-Z
High-Z
Reset
X
X
X
L
X
X
High-Z
High-Z
High-Z


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