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S29GL01GP 数据表(PDF) 42 Page - Cypress Semiconductor

部件名 S29GL01GP
功能描述  1 Gbit, 512, 256, 128 Mbit, 3 V, Page Flash with 90 nm MirrorBit Process Technology
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制造商  CYPRESS [Cypress Semiconductor]
网页  http://www.cypress.com
标志 CYPRESS - Cypress Semiconductor

S29GL01GP 数据表(HTML) 42 Page - Cypress Semiconductor

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Document Number: 002-00886 Rev. *B
Page 42 of 83
S29GL01GP
S29GL512P
S29GL256P
S29GL128P
Figure 8.3
Lock Register Program Algorithm
Write Unlock Cycles:
Address 555h, Data AAh
Address 2AAh, Data 55h
Write
Enter Lock Register Command:
Address 555h, Data 40h
Program Lock Register Data
Address XXXh, Data A0h
Address XXXh*, Data PD
Unlock Cycle 1
Unlock Cycle 2
XXXh = Address don’t care
Program Data (PD): See text for Lock Register definitions
Caution: Lock register can only be progammed once.
PASS. Write Lock Register
Exit Command:
Address XXXh, Data 90h
Address XXXh, Data 00h
Device returns to reading array.
Perform Polling Algorithm
(see Write Operation Status
flowchart)
Yes
Yes
No
No
Done?
DQ5 = 1?
Error condition (Exceeded Timing Limits)
FAIL. Write rest command
to return to reading array.


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