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GS1500 数据表(PDF) 10 Page - Gennum Corporation

部件名 GS1500
功能描述  HDTV Serial Digital Deformatter with ANC FIFOs
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制造商  GENNUM [Gennum Corporation]
网页  http://www.gennum.com
标志 GENNUM - Gennum Corporation

GS1500 数据表(HTML) 10 Page - Gennum Corporation

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GENNUM CORPORATION
522 - 33 - 00
10
NOTE: If a simultaneous FIFO read and write operation is to
be performed, the FF_STA[2:0] outputs should not be used
as they may indicate incorrect FIFO status.
6.2. ANC/DATA Extraction
When the control signal ANC/DATA is high and WEN is low,
the device detects the ANC data header and extracts the
ANC data (including the header) when these data are
present in the video streams. When ANC/DATA and WEN
are both low, the device extracts all original video data into
the FIFO. To ensure ANC data extraction from the LUMA or
CHROMA channels, empty (unload) the ANC data from the
respective FIFO buffer during the active video portion of the
data streams. ANC data is extracted from a video stream
and written into the corresponding internal FIFO buffer until
it is completely full. When a FIFO buffer is full, the
FF_STA[2:0] signal is set to 110.
The device provides ANC data copying capability as an
alternative to extraction. When EX/CP is high, the extraction
function is enabled. The device replaces the extracted data
in the video streams with their respective blanking levels. If
EX/CP is low, the copy function is enabled. All the original
data remain in the video stream after copying them into the
FIFO buffer.
To extract ANC data from the HANC region only, the device
provides an automated extraction mode. When the control
signal FM_I/E is high, the FIFO control signals FFRST and
WEN cannot be used.
In this mode of operation, the device generates reset and
enable signals internally, which allows an automated
extraction of ANC data from HANC region of the incoming
LUMA and CHROMA data streams. The user must supply a
proper REN signal to enable the access of ANC data stored
in the FIFO. These data should be read out of the FIFO
during the active video period. Once all words have been
read from the FIFO, the FF_STA signal is set to 001. If the
user has not emptied the FIFO by the time the next HANC
period begins, all data within the FIFO is discarded and the
FIFO resets so that read and write address pointers are at
their starting position.
When the control signal FM_I/E is low, the user has full
control over reading from and writing to the FIFO, including
the FIFO reset (FFRST) and FIFO write enable (WEN).
The ANC data output ANC_OUT[9:0] can be set to a high Z
state with the FOEN control signal. When FOEN is low, the
ANC_OUT[9:0] outputs are enabled. When FOEN is high,
the ANC_OUT[9:0] outputs are in a high Z state. Internal
read address pointers are incremented regardless of the
state of FOEN when REN is low.
6.3. FIFO Read Control
The FIFO control signal REN is the read enable signal used
to access ANC data in the internal FIFO through the FIFO
interface. The user can access only one of the two internal
FIFO buffers at a time. The LUMA FIFO can be read when
ANC_Y/C is high. The CHROMA FIFO can be read when
ANC_Y/C is low.
When the internal FIFO is not in the empty or underrun
states, it is ready to provide ANC data to the user. At this
point, the user should read up to 1024 data words from
each FIFO through the FIFO interface. When REN is low
and a rising edge on R_CLK is detected, the device outputs
the next word stored in the FIFO. Each time R_CLK is
toggled while REN is low, the internal read address pointer
(LUMA or CHROMA) is incremented. When REN is high, the
read address pointer is not incremented.
6.4. FIFO Write Control
The FIFO control signal WEN is the write enable signal. It
enables the ANC data extraction from either the LUMA or
the CHROMA video streams into the internal respective
FIFO buffers. When WEN is LOW, the write address pointer
increments with the internal clock at the video data rate.
When WEN is HIGH, the write address pointer does not
increment. To reset both address pointers for read and write
to their starting positions, toggle the FIFO reset signal
FFRST from high to low.
6.5. FIFO External Reset
In external FIFO control mode, the internal FIFO address
pointers are reset to zero (0) using FFRST. A recommended
external reset process is shown in Figure 16.
7. READING CRC ERROR FLAGS
The GS1500 provides error flags which track the Cyclic
Redundancy Code embedded in each line of LUMA and
CHROMA
video
streams
(LINE_CRC_ERR_Y
and
LINE_CRC_ERR_C, respectively).
NOTE: For users monitoring the status of the CRC error
flags, it is strongly recommended that they are read only
when FOEN is low.


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