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LC78681E 数据表(PDF) 7 Page - Sanyo Semicon Device |
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LC78681E 数据表(HTML) 7 Page - Sanyo Semicon Device |
7 / 23 page Continued from preceding page. Functional Description HF Signal Input Circuit (pin 8: EFMIN, pin 7: EFMO and pin 6: EFMO) An EFM signal (NRZ) sliced at the optimum level is obtained when the HF signal is input on EFMIN. No. 4521-7/23 LC78681E No. Name I/O Description 38 LRSY O 39 CK2 O 40 ROMOUT O For output of CD-ROM interface signals. 41 C2FCLK O 42 C2F O 43 DOUT O Digital OUT output 44 SBSY O Subcode block synchronization output 45 EFLG O C1 and C2 single and double error correction flag. 46 PW O 47 SFSY O 48 SBCK I 49 FSX O 7.35 kHz synchronization signal output 50 WRQ O 51 RWC I 52 SQOUT O 53 COIN I 54 CQCK I 55 RES I Set to low at powerup. 56 M/L I Same as for pins 50 to 54. 57 LASER O Permits control via serial control from the microprocessor. 58 16 M O 16.9344 MHz output pin 59 4.2 M O 4.2336 MHz output pin. 60 CONT O Permits control via serial control from the microprocessor. 61 TEST5 I LSI test input. Normally unconnected. 62 CS I Chip select pin. The LC78681 is active when this pin is low (on-chip pull-down resistor). 63 XIN I 16.9344 MHz crystal oscillator connection pins. 64 XOUT O SFSY is subcode frame synchronization signal. P, Q, R, S, T, U, V, and W subcodes are read out by sending clock eight times to SBCK. WRQ goes high when Q subcode data passes the CRC check. Through external connection and sending of CQCK, data is read from SQOUT. Set MSB-first/LSB-first to low when data in LSB-first format is desired. Command is generated by sending output synchronized with CQCK command data after setting microprocessor RWC to high. |
类似零件编号 - LC78681E |
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类似说明 - LC78681E |
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