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MC145408LP 数据表(PDF) 5 Page - LANSDALE Semiconductor Inc. |
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MC145408LP 数据表(HTML) 5 Page - LANSDALE Semiconductor Inc. |
5 / 8 page www.lansdale.com Page 5 of 8 Issue A PIN DESCRIPTIONS VCC Digital Power Supply The digital supply pin, which is connected to the logic power supply (+ 5.5 V maximum). GND Ground Ground return pin is typically connected to the signal ground pin of the EIA–232–E connector (Pin 7) as well as to the logic power supply ground. VDD Most Positive Device Pin The most positive power supply pin, which is typically + 5 to + 12 V. VSS Most Negative Device Pin The most negative power supply pin, which is typically – 5 to – 12 V. Rx1 – Rxn Receive Data Input Pins These are the EIA–232–E receive signal inputs. A voltage between + 3 and + 25 V is decoded as a space, and causes the corresponding DO pin to swing to ground (0 V). A voltage between – 3 and – 25 V is decoded as a mark, and causes the corresponding DO pin to swing to VCC. DO1 – DOn Data Output Pins These are the receiver digital output pins which swing fromVCC to GND. Each output pin is capable of driving one LSTTL input load. LANSDALE Semiconductor, Inc. ML145403, ML145404, ML145405, ML145408 Figure 1. Power–Off Source Resistance Illustrated for ML145408 DI5 14 1 24 11 VDD 16 18 20 22 9 3 5 7 13 12 GND VDD VCC DI4 DI3 DI2 DI1 Tx5 Tx4 Tx3 Tx2 Tx1 Vin = ± 2 V Rout Vin I Figure 2. Switching Characteristics 50% DI + 3 V 0 V tf 10% 90% tr tPHL tPLH VOL VOH Tx DRIVERS 50% Rx + 3 V 0 V tf 10% 90% tr tPHL tPLH VOL VOH DO RECEIVERS Figure 3. Slew Rate Characteristics Tx + 3 V tSHL DRIVERS + 3 V tSLH – 3 V – 3 V Slew Rate = 6 V tSLH or tSHL |
类似零件编号 - MC145408LP |
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类似说明 - MC145408LP |
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