Document Number: 002-14867 Rev. *F

Page 32 of 51

CYW20705

9. Electrical Characteristics

Table 9. Absolute Maximum Voltages

Rating

Symbol

Minimum

Typical

Maximum

Unit

DC supply voltage for RF

a. VDD_RF collectively refers to the VDDIF, VDDLNA, VDDPX, and VDDRF RF power supplies.

–

1.22

1.32

V

DC supply voltage for core

VDDC

–

1.22

1.32

V

DC supply voltage for I/O

b. If VDDO is not applied, voltage should never be applied to any digital I/O pins (I/O pins should never be driven or pulled high). The list of digital I/O pins includes the

following (these pins are listed in Section 7.: “Pin-out and Signal Descriptions,” on page 29 with VDDO shown as their power domain):

GPIO[3], GPIO[5], GPIO[6]

SCL, SDA

N_MODE

SPIM_CS_N, SPIM_CLK

–1.8

3.6

V

DC supply

VDDTF

–

1.12

c. VDDTF for Class 2 must be connected to VREG (main LDO output). VDDTF for Class 1 must be connected to VREGHV (HV LDO output) or an external voltage source.

Refer to the Cypress compatibility guide for configuration details.

V

Voltage on input or output pin

VIMAX, VIMIN

–

VDDO + 0.3

V

Storage temperature range

TSTG

–40

–

125

°C

Table 10. Power Supply

Parameter

Symbol

Minimum

Typical

Maximum

Unit

DC supply voltage for RF

a. VDD_RF collectively refers to the VDDIF, VDDLNA, VDDPX, VDDLNA, VDDRF RF power supplies.

1.159

1.22

1.281

V

DC supply noise for RF, from 100 kHz to 1 MHz

b. Overall performance defined using integrated regulation.

––

150

μV rms

DC supply voltage for core

VDDC

1.159

1.22

1.281

V

DC supply voltage for I/O

VDDO

1.7

–

3.6

V

DC supply voltage for USB

VDD_USB

3.0

3.3

3.6

V

DC supply

c. VDDTF for Class 2 must be connected to VREG (main LDO output). VDDTF for Class 1 must be connected to VREGHV (HV LDO output) or an external voltage source.

Refer to the Cypress compatibility guide for configuration details. VDDTF requires a capacitor to ground. The value of the capacitor must be tuned to ensure optimal

RF RX sensitivity. Typical 10 pF for BGA packages and 6.2 pF for wafer package. The value may depend on board layout.

1.12

–

d. Can be 3.3V if the output power is limited to 9 dBm.

V

Table 11. High-Voltage Regulator (HV LDO) Electrical Specifications

Parameter

Minimum

Typical

Maximum

Unit

Input voltage

2.3

–

5.5

V

Output voltage

1.8

–

3.3

V

Max current load

–

–

95

mA

Load capacitance

1

–

10

μF

Load capacitor ESR

0.01

–

2

Ω

PSRR

20

–

40

dB

–

–

200

μs

Dropout voltage

–

–

200

mV