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FAN65004B 数据表(PDF) 22 Page - ON Semiconductor

部件名 FAN65004B
功能描述  PWM Buck Regulator
Download  26 Pages
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制造商  ONSEMI [ON Semiconductor]
网页  http://www.onsemi.com
标志 ONSEMI - ON Semiconductor

FAN65004B 数据表(HTML) 22 Page - ON Semiconductor

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FAN65004B
www.onsemi.com
22
Figure 46. Power Stage, Loop Gain and Compensator
Bode Plots
For ease of calculation, with C1 >> C3:
ƒ
z1 +
1
2
p @ (R10 ) R9) @ C9
ƒ
z2 +
1
2
p @ R8 @ C7
ƒ
p2 +
1
2
p @ R9 @ C9
ƒ
p3 +
1
2
p @ R8 @ C8
ƒc +
V
IN
2
p @ V
Ramp @ R10 @ C7
Thermal Considerations
The temperature gradients on the FAN65004B are shown
below. While measuring the thermal performance, place the
thermocouple at the hottest spot of the IC (not at the center
of the part).
Layout Guidelines
1. Place RT resistor and SS capacitor close to RT and
SS pins.
2. Use a low impedance source such as a logic gate to
drive the SYNC pin and keep the PCB trace as
short as possible.
3. Components of digital signals like EN/UVLO,
PGOOD and SYNC can be placed far away from
device.
4. Place BOOT capacitor right next to BOOT and PH
pins. If flexibility of high−side MOSFET driving
strength is desired, place a resistor in series with
this BOOT capacitor. For Vin > 40 V, use Rboot
= 2 ohm.
5. Place inductor on top layer. Restrict the SW trace
to only cover the inductor pin but keep its trace as
wide as possible for thermal relief.
6. Avoid all the compensation components from
passing through, above or underneath switching
trace.
7. Keep the switching nodes away from sensitive
small signal nodes (FB). Ideally the switch nodes
printed circuit traces should be routed away and
separated from the IC and especially the quiet side
of the IC. Separate the high dv/dt traces from
sensitive small−signal nodes with ground traces or
ground planes.
8. Place decoupling caps right next to PVCC, VCC ,
HVBIAS and EXTBIAS.
9. The output capacitors should be placed as close to
the load as possible. Use short wide copper regions
to connect output capacitors to load to avoid
inductance and resistances.


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