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SLG46535 数据表(PDF) 76 Page - Dialog Semiconductor |
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SLG46535 数据表(HTML) 76 Page - Dialog Semiconductor |
76 / 185 page SLG46535_DS_106 Page 75 of 184 SLG46535 9.5.1 3-Bit LUT or Pipe Delay Macrocells Used as 3-Bit LUTs Each Macrocell, when programmed for a LUT function, uses a 8-bit register to define their output function: 3-Bit LUT10 is defined by reg<1263:1256> 9.5.2 3-Bit LUT or Pipe Delay Macrocells Used as Pipe Delay Register Settings Table 54. Pipe Delay Register Settings Signal Function Register Bit Address Register Definition LUT3_10 or Pipe Delay Output Select reg<1270> 0: LUT3_10 1: 1 Pipe Delay Output OUT0 select reg<1259:1256> OUT1 select reg<1263:1260> Pipe delay OUT1 Polarity Select Bit reg<1271> 0: Non-inverted 1: Inverted Table 53. 3-bit LUT10 Truth Table IN2 IN1 IN0 OUT 0 0 0 reg <1256> LSB 0 0 1 reg <1257> 0 1 0 reg <1258> 0 1 1 reg <1259> 1 0 0 reg <1260> 1 0 1 reg <1261> 1 1 0 reg <1262> 1 1 1 reg <1263> MSB |
类似零件编号 - SLG46535 |
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类似说明 - SLG46535 |
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