数据搜索系统,热门电子元器件搜索
  Chinese▼

Delete All
ON OFF
ALLDATASHEETCN.COM

X  

预览 PDF Download HTML

AD526CD Datasheet(数据表) 12 Page - Analog Devices

部件型号  AD526CD
说明  Software Programmable Gain Amplifier
下载  15 Pages
Scroll/Zoom Zoom In 100% Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 

AD526CD Datasheet(HTML) 12 Page - Analog Devices

 
Zoom Inzoom in Zoom Outzoom out
 12 page
background image
AD526
REV. D
–11–
OFFSET NULLING
Input voltage offset nulling of the AD526 is best accomplished
at a gain of 16, since the referred-to-input (RTI) offset is ampli-
fied the most at this gain and therefore is most easily trimmed.
The resulting trimmed value of RTI voltage offset typically
varies less than 3
µV across all gain ranges.
Note that the low input current of the AD526 minimizes RTI
voltage offsets due to source resistance.
OUT
FORCE
OUT
SENSE
VOUT
0.1 F
–VS
0.1 F
+VS
VIN
16
15
14
13
12
11
10
9
12
34
56
78
+
AD526
16
84
21
GAIN NETWORK
A1
A0
CS CLK
A2
B
LOGIC AND LATCHES
20k
Figure 39. Offset Voltage Null Circuit
OUTPUT CURRENT BOOSTER
The AD526 is rated for a full
±10 V output voltage swing into
2 k
Ω. In some applications, the need exists to drive more cur-
rent into heavier loads. As shown in Figure 40, a high current
booster may be connected “inside the loop” of the SPGA to
provide the required current boost without significantly degrad-
ing overall performance. Nonlinearities, offset and gain inaccu-
racies of the buffer are minimized by the loop gain of the
AD526 output amplifier.
OUT
FORCE
OUT
SENSE
–VS
0.1 F
+VS
VIN
16
15
14
13
12
11
10
9
12
34
56
78
+
AD526
16
84
21
GAIN NETWORK
A1
A0
CS CLK
A2
B
LOGIC AND LATCHES
HOS-100
0.01 F
0.1 F
0.01 F
RL
Figure 40. Current Output Boosting
CASCADED OPERATION
A cascade of two AD526s can be used to achieve binarily
weighted gains from 1 to 256. If gains from 1 to 128 are needed,
no additional components are required. This is accomplished by
using the B pin as shown in Figure 38. When the B pin is low,
the AD526 is held in a unity gain stage independent of the other
gain code values.
OFFSET NULLING WITH A D/A CONVERTER
Figure 41 shows the AD526 with offset nulling accomplished
with an 8-bit D/A converter (AD7524) circuit instead of the
potentiometer shown in Figure 39. The calibration procedure is
the same as before except that instead of adjusting the potenti-
ometer, the D/A converter corrects for the offset error. This
calibration circuit has a number of benefits in addition to elimi-
nating the trimpot. The most significant benefit is that calibra-
tion can be under the control of a microprocessor and therefore
can be implemented as part of an autocalibration scheme. Sec-
ondly, dip switches or RAM can be used to hold the 8-bit word
after its value has been determined. In Figure 42 the offset null
sensitivity, at a gain of 16, is 80
µV per LSB of adjustment,
which guarantees dc accuracy to the 16-bit performance level.
OUT
FORCE
OUT
SENSE
VOUT
0.1 F
–VS
0.1 F
+VS
VIN
16
15
14
13
12
11
10
9
1
2
34
56
7
8
+
AD526
16
84
21
GAIN NETWORK
A1
A0
CS CLK
A2
B
LOGIC AND LATCHES
AD581 OR
AD587
+10V
VREF
7.5M
3.3M
AD548
0.01 F
0.01 F
+
+VS
–VS
ALL BYPASS CAPACITORS ARE 0.1 F
AD7524
GND
10 F
1k
OUT 1
OUT 2
+VS
MSB
LSB
CS
WR
Figure 41. Offset Nulling Using a DAC




HTML 页

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15 


数据表 下载




链接网址


Privacy Policy
ALLDATASHEETCN.COM
ALLDATASHEET是否为您带来帮助?  [ DONATE ]  

关于 Alldatasheet    |   广告服务   |   联系我们   |   隐私政策   |   书签   |   链接交换   |   制造商名单
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  , Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp  |   Russian : Alldatasheetru.com
Korean : Alldatasheet.co.kr   |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com  |   Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl