18

LT1941

1941f

In Figure 6a, a larger capacitor on RUN/SS2 delays chan-

nel 2 with respect to channel 1. The soft-start capacitor on

RUN/SS2 should be at least twice the value of the capacitor

on RUN/SS1. A larger ratio may be required, depending on

the output capacitance and load on each channel. Make

sure to test the circuit in the system before deciding on

final values for these capacitors.

The circuit in Figure 6b requires the fewest components,

with both channels sharing a single soft-start capacitor.

The power good comparator of channel 1 disables chan-

nel 2 until output 1 is in regulation.

For independent control of channel 2, use the circuit in

Figure 6c. The capacitor on RUN/SS1 is smaller than the

capacitor on RUN/SS2. This allows the LT1941 to start up

and enable its power good comparator before RUN/SS2

gets high enough to allow channel 2 to start switching.

Channel 2 only operates when it is enabled with the

external control signals and output 1 is in regulation.

The circuit in Figure 6a leaves both power good indicators

free. However, the circuits in Figures 6b and 6c have

another advantage. As well as sequencing the two outputs

at start-up, they also disable channel 2 if output 1 falls out

of regulation (due to a short circuit or a collapsing input

voltage).

Finally, be aware that the circuit in Figure 6d does not

work, because the power good comparators are disabled

in shutdown.

PCB LAYOUT

For proper operation and minimum EMI, care must be

taken during printed circuit board (PCB) layout. Figure 7

shows the high current paths in the step-down regulator

circuit. Note that in the step-down regulators large, switched

currents flow in the power switch, the catch diode and the

input capacitor. In the inverter/boost regulator large,

switched currents flow through the power switch, the

switching diode, and either the output capacitor in boost

configuration, or the tank capacitor in the inverter configu-

ration. The loop formed by these components should be as

small as possible. Place these components, along with the

inductor and output capacitor, on the same side of the

circuit board and connect them on that layer. Place a local,

unbroken ground plane below these components and tie

this ground plane to system ground at one location, ideally

at the ground terminal of the output capacitor C2. Addi-

tionally, keep the SW and BOOST nodes as small as

possible.

APPLICATIO S I FOR ATIO

OFF

1941 F06

RUN/SS1

PG1

ON

GND

OFF

RUN/SS1

LT1941

LT1941

ON

GND

RUN/SS2

OFF

RUN/SS1

ON

OFF2 ON2

GND

RUN/SS2

RUN/SS2

PG1

1nF

1nF

1nF

2.2nF

1nF

1.5nF

1.5nF

(6b) Fewest Components

(6c) Independent Control of Channel 2

OFF

RUN/SS1

ON

GND

RUN/SS2

PG1

(6d) Doesn't Work !

(6a) Channel 2 is Delayed

LT1941

LT1941

Figure 6. Several Methods of Sequencing Two Ouputs. Channel 1 Starts First