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ATWILC1000B-MUT 数据表(PDF) 13 Page - ATMEL Corporation |
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ATWILC1000B-MUT 数据表(HTML) 13 Page - ATMEL Corporation |
13 / 38 page ATWILC1000B-MUT [DATASHEET] Atmel-42491B-ATWILC1000B-MUT_Datasheet_03/2016 1 3 13 5 Clocking 5.1 Crystal Oscillator Table 5-1. Crystal Oscillator Parameters Parameter Min. Typ. Max. Unit Crystal Resonant Frequency 12 26 40 MHz Crystal Equivalent Series Resistance 50 150 Ω Stability – Initial Offset (1) -100 100 ppm Stability - Temperature and Aging -25 25 Note: 1. Initial offset must be calibrated to maintain ±25ppm in all operating conditions. This calibration is performed during final production testing. The block diagram in Figure 5-1(a) shows how the internal Crystal Oscillator (XO) is connected to the external crystal. The XO has 5pF internal capacitance on each terminal XO_P and XO_N. To bypass the crystal oscillator with an external reference, an external signal capable of driving 5pF can be applied to the XO_N terminal as shown Figure 5-1(b). Figure 5-1. XO Connections ATWILC1000B XO_N XO_P (a) ATWILC1000B XO_N XO_P (b) External Clock (a) Crystal Oscillator is Used b) Crystal Oscillator is Bypassed Table 5-2 specifies the electrical and performance requirements for the external clock. Table 5-2. Bypass Clock Specification Parameter Min. Max. Unit Comments Oscillation frequency 12 32 MHz Must be able to drive 5pF load @ desired fre- quency Voltage swing 0.5 1.2 Vpp Must be AC coupled Stability – Temperature and Aging -25 +25 ppm Phase Noise -130 dBc/Hz At 10kHz offset Jitter (RMS) <1psec Based on integrated phase noise spectrum from 1kHz to 1MHz |
类似零件编号 - ATWILC1000B-MUT |
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类似说明 - ATWILC1000B-MUT |
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