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AD5338BRM-REEL7 数据表(PDF) 8 Page - Analog Devices |
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AD5338BRM-REEL7 数据表(HTML) 8 Page - Analog Devices |
8 / 24 page AD5337/AD5338/AD5339 Rev. A | Page 8 of 24 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS VDD VOUTA GND SDA SCL VOUTB REFIN A0 TOP VIEW (Not to Scale) 8 7 6 5 1 2 3 4 AD5337/ AD5338/ AD5339 Figure 3. Pin Configuration Table 5. Pin Function Descriptions Pin No. Mnemonic Function 1 VDD Power Supply Input. These parts can be operated from 2.5 V to 5.5 V, and the supply should be decoupled to GND. 2 VOUTA Buffered Analog Output Voltage from DAC A. The output amplifier has rail-to-rail operation. 3 VOUTB Buffered Analog Output Voltage from DAC B. The output amplifier has rail-to-rail operation. 4 REFIN Reference Input Pin for the Two DACs. It has an input range from 0.25 V to VDD. 5 GND Ground Reference Point for All Circuitry on the Parts. 6 SDA Serial Data Line. This is used in conjunction with the SCL line to clock data into or out of the 16-bit input shift register. It is a bidirectional open-drain data line that should be pulled to the supply with an external pull-up resistor. 7 SCL Serial Clock Line. This is used in conjunction with the SDA line to clock data into or out of the 16-bit input shift register. Clock rates of up to 400 kbps can be accommodated in the 2-wire interface. 8 A0 Address Input. Sets the least significant bit of the 7-bit slave address. |
类似零件编号 - AD5338BRM-REEL7 |
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类似说明 - AD5338BRM-REEL7 |
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