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ST20190 数据表(PDF) 4 Page - STMicroelectronics |
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ST20190 数据表(HTML) 4 Page - STMicroelectronics |
4 / 7 page ST20190 4/7 Figure 4. Block Diagram of ST20196 5.2.3 Interface to Utopia Bus The IC contains the ATM-related functions to interface with the ATM utopia bus an supports level 1 and 2 modes. 5.2.4 Control of Transceiver Chip The ST20196 runs the firmware controlling the operations of the ADSL transceiver (AFE, DMT modem, Framer). During modem initialisation, the controller computes and sets up parameters for all programma- ble DMT functions, filters and equalizers. The ATM TC includes cell level functions (such as cell delinea- tion, insertion/ extraction of idle cells, payload scrambling, HEC check) and data frame generation. The controller is able to run in different rate-adaptive modes as defined by the operator. During operation, the ST20196 performs continuous line monitoring and initiates consecutive actions as specified by the oper- ator (e.g. bit-swapping, dynamic bit-rate adaptation, power management, … etc.) and collects perfor- mance and error information for use by management entities. 5.2.5 Interface to Management Entities The ST20196 also runs the communication protocol to interface with external management entities. A spe- cific ADSL modem control interface has been defined to ease the integration with both systems hardware and firmware. This control communication channel is used to transfer information and commands between modem and management entities. These commands/responses are fully described in the CtrlE specifica- tion and can be categorized as follows: - Configuration of a modem line - De-allocation of a modem line - Operational Data Retrieval - Performance Data Retrieval - Defect Retrieval FLASH CTRL SDRAM CTRL EBI ROM RAM CTRLE ARM946 AHB2APB INTERRUPT CTR RT TIMERS WATCHDOG UART GPIO JTAG DMT CORE TIC AFE Interface ATM Interface |
类似零件编号 - ST20190 |
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类似说明 - ST20190 |
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