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AM93LC66N 数据表(PDF) 6 Page - Anachip Corp |
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AM93LC66N 数据表(HTML) 6 Page - Anachip Corp |
6 / 10 page 4096-bits Serial Electrically Erasable PROM AM93LC66 Anachip Corp. www.anachip.com.tw Rev. A1 Oct 20, 2003 6/10 ATC Timing Diagram (1) FIGURE 2. SYNCHRONOUS DATA TIMING T t SKH t SKL t CSH t CSS CS SK DI DO(READ) DO(WRITE) (WRALL) (ERASE) (ERALL) t SV STATUS VALID t DF t DF t PD1 t PDO t DIS t DIH FIGURE 3. DATA READ CYCLE TIMING CS SK + AO AN 0 1 1 DI DN DO O DO TRI-STATE +For all instructions, SK cycles before start bit don't care. *Address Pointer Cycle to the Next Register. * t CS |
类似零件编号 - AM93LC66N |
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类似说明 - AM93LC66N |
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