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AD7920AKS-500RL7 数据表(PDF) 11 Page - Analog Devices |
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AD7920AKS-500RL7 数据表(HTML) 11 Page - Analog Devices |
11 / 20 page REV. B AD7910/AD7920 –11– When the ADC starts a conversion (see Figure 5), SW2 opens and SW1 moves to position B, causing the comparator to become unbalanced. The control logic and charge redistribution DAC are used to add and subtract fixed amounts of charge from the sampling capacitor to bring the comparator back into a balanced condition. When the comparator is rebalanced, the conversion is complete. The control logic generates the ADC output code. Figure 6 shows the ADC transfer function. CHARGE REDISTRIBUTION DAC CONTROL LOGIC COMPARATOR SW2 SAMPLING CAPACITOR CONVERSION PHASE SW1 A B AGND VDD/2 VIN Figure 5. ADC Conversion Phase ADC Transfer Function The output coding of the AD7910/AD7920 is straight binary. The designed code transitions occur at the successive integer LSB values, i.e., 1 LSB, 2 LSBs, and so on. The LSB size is VDD/4096 for the AD7920 and VDD/1024 for the AD7910. The ideal transfer characteristic for the AD7910/AD7920 is shown in Figure 6. 000...000 0V ANALOG INPUT 111...111 000...001 000...010 111...110 111...000 011...111 1LSB +VDD –1LSB 1LSB = VDD/1024 (AD7910) 1LSB = VDD/4096 (AD7920) Figure 6. Transfer Characteristic Typical Connection Diagram Figure 7 shows a typical connection diagram for the AD7910/ AD7920. VREF is taken internally from VDD and, as such, VDD should be well decoupled. This provides an analog input range of 0 V to VDD. The conversion result is output in a 16-bit word with four leading zeros followed by the MSB of the 12-bit or 10-bit result. The 10-bit result from the AD7910 will be followed by two trailing zeros. Alternatively, because the supply current required by the AD7910/ AD7920 is so low, a precision reference can be used as the supply source to the AD7910/AD7920. An REF19x voltage reference (REF195 for 5 V or REF193 for 3 V) can be used to supply the required voltage to the ADC (see Figure 7). This con- figuration is especially useful if the power supply is quite noisy or if the system supply voltages are at a value other than 5 V or 3V (e.g., 15 V). The REF19x will output a steady voltage to the AD7910/AD7920. If the low dropout REF193 is used, the current it needs to supply to the AD7910/AD7920 is typically 1.2 mA. When the ADC is converting at a rate of 250 kSPS the REF193 needs to supply a maximum of 1.4 mA to the AD7910/AD7920. The load regulation of the REF193 is typically 10 ppm/mA (REF193, VS = 5 V), which results in an error of 14 ppm (42 mV) for the 1.4 mA drawn from it. This corresponds to a 0.057 LSB error for the AD7920 with VDD = 3 V from the REF193 and a 0.014 LSB error for the AD7910. For applications where power consumption is of concern, the power-down mode of the ADC and the sleep mode of the REF19x reference should be used to improve power performance. See the Modes of Operation section. AD7910/ AD7920/ SCLK SDATA CS VIN GND 0V TO VDD INPUT VDD C/ P SERIAL INTERFACE 0.1 F 1 F TANT REF193 1.2mA 680nF 10 F 0.1 F 3V 5V SUPPLY Figure 7. REF193 as Power Supply Table I provides typical performance data with various references used as a VDD source for a 100 kHz input tone at room temper- ature under the same setup conditions. Table I. AD7920 Typical Performance for Various Voltage References IC Reference AD7920 SNR Tied to VDD Performance (dB) AD780 @ 3 V 72.65 REF193 72.35 AD780 @ 2.5 V 72.5 REF192 72.2 REF43 72.6 |
类似零件编号 - AD7920AKS-500RL7 |
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类似说明 - AD7920AKS-500RL7 |
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