AD7771BCPZ-RL datasheet(9/99 Pages) AD

部件名	AD7771BCPZ-RL

功能描述	8-Channel, 24-Bit, Simultaneous Sampling ADC

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制造商	AD [Analog Devices]

网页	http://www.analog.com

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9 / 99 page

AD7771

Data Sheet

Rev. 0 | Page 8 of 98

Parameter

Test Conditions/Comments

Min

Typ

Max

Unit

POWER SUPPLIES

All Σ-Δ channels enabled

AVDD1x − AVSSx

3.0

3.6

V

IAVDD1x4, 5

Reference buffer pre-Q, VCM

enabled, internal reference

enabled

High resolution mode

18.3

23.7

mA

Low power mode

5

6.4

mA

Reference buffer enabled, VCM

enabled, internal reference

enabled

High resolution mode

20.5

26.7

mA

Low power mode

5.5

7.1

mA

Reference buffer disabled, VCM

disabled, internal reference

disabled

High resolution mode

14.3

18.8

mA

Low power mode

3.9

5.1

mA

AVDD2x − AVSSx

2.2

3.6

V

IAVDD2x

High resolution mode

10.2

10.65

mA

Low power mode

3.8

4

mA

AVDD4 − AVSSx

3

3.6

V

IAVDD4

SAR enabled

1.7

2

mA

SAR disabled

1

10

µA

AVSSx − DGND

−1.8

0

V

IOVDD − DGND

1.8

3.6

V

IIOVDD

High resolution mode (sinc5)

14.3

17

mA

Low power mode (sinc5)

4.6

5.5

mA

High resolution mode (sinc3)

12.2

14.2

mA

Low power mode (sinc3)

2.2

4.9

mA

Power Dissipation6

Internal buffers bypassed, internal

reference disabled, internal

oscillator disabled, SAR disabled

High Resolution Mode

128 kSPS

133

153

mW

Low Power Mode

32 kSPS

42

48.5

mW

Power-Down

All ADCs disabled

530

µW

1

AVSSx refers to the following pins: AVSS1A, AVSS1B, AVSS2A, AVSS2B, AVDD3, and AVSS4. This term is used throughout the data sheet.

2

At temperatures higher than 105°C, the device can be operated normally, though slight degradation on the maximum/minimum specifications is expected because

these specifications are only guaranteed up to 105°C. See the Typical Performance Characteristics section for plots showing the typical performance of the device at

high temperatures.

3

The SDO pin and the DOUTx pin are configured in the default mode of strength.

4

AVDD1x = 3.3 V, AVSSx = GND = ground, IOVDD = 1.8 V, CMOS clock.

5

Disabling either the VCM pin or the internal reference results in a 40 µA typical current consumption reduction.

6

Power dissipation is calculated using the maximum supply voltage, 3.6 V.

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