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GS81313LD36GK-625 数据表(PDF) 5 Page - GSI Technology

部件名 GS81313LD36GK-625
功能描述  4Mb x 36 and 8Mb x 18 organizations available
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制造商  GSI [GSI Technology]
网页  http://www.gsitechnology.com
标志 GSI - GSI Technology

GS81313LD36GK-625 数据表(HTML) 5 Page - GSI Technology

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GS81313LD18/36GK-833/714/625
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.13 7/2016
5/26
© 2014, GSI Technology
PZT[1:0]
ODT Configuration Select — Set the ODT state for various combinations of input groups when MZT[1:0] =
01 or 10. Must be tied High or Low.
PZT[1:0] = 00: enables ODT on write data only.
PZT[1:0] = 01: enables ODT on write data and input clocks.
PZT[1:0] = 10: enables ODT on write data, address, and control.
PZT[1:0] = 11: enables ODT on write data, input clocks, address, and control.
Input
VDD
Core Power Supply
VDDQ
I/O Power Supply
VREF
Input Reference Voltage — Input buffer reference voltage.
VSS
Ground
TCK
JTAG Clock — Weakly pulled Low internally.
Input
TMS
JTAG Mode Select — Weakly pulled High internally.
Input
TDI
JTAG Data Input — Weakly pulled High internally.
Input
TDO
JTAG Data Output
Output
MCH
Must Connect High — May be tied to VDDQ directly or via a 1k resistor.
Input
MCL
Must Connect Low — May be tied to VSS directly or via a 1k resistor.
Input
NC
No Connect — There is no internal chip connection to these pins. They may be left unconnected, or tied/
driven High or Low.
NUI
Not Used Input — There is an internal chip connection to these input pins, but they are unused by the
device. They are pulled Low internally. They may be left unconnected or tied/driven Low. They should not be
tied/driven High.
Input
NUO
Not Used Output — There is an internal chip connection to these output pins, but they are unused by the
device. The drivers are tri-stated internally. They should be left unconnected.
Output
Symbol
Description
Type


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