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GS816032DGT-200IV 数据表(PDF) 5 Page - GSI Technology

部件名 GS816032DGT-200IV
功能描述  1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs
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制造商  GSI [GSI Technology]
网页  http://www.gsitechnology.com
标志 GSI - GSI Technology

GS816032DGT-200IV 数据表(HTML) 5 Page - GSI Technology

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TQFP Pin Description
Symbol
Type
Description
A0, A1
I
Address field LSBs and Address Counter preset Inputs
A
I
Address Inputs
DQA
DQB
DQC
DQD
I/O
Data Input and Output pins
BW
I
Byte Write—Writes all enabled bytes; active low
BA, BB
I
Byte Write Enable for DQA, DQB Data I/Os; active low
BC, BD
I
Byte Write Enable for DQC, DQD Data I/Os; active low
CK
I
Clock Input Signal; active high
GW
I
Global Write Enable—Writes all bytes; active low
E1, E3
I
Chip Enable; active low
E2
I
Chip Enable; active high
G
I
Output Enable; active low
ADV
I
Burst address counter advance enable; active low
ADSP, ADSC
I
Address Strobe (Processor, Cache Controller); active low
ZZ
I
Sleep Mode control; active high
FT
I
Flow Through or Pipeline mode; active low
LBO
I
Linear Burst Order mode; active low
VDD
I
Core power supply
VSS
I
I/O and Core Ground
VDDQ
I
Output driver power supply
NC
No Connect
GS816018/32/36DGT-xxxV
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.03a 9/2013
5/22
© 2011, GSI Technology


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