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GS8321Z18AD-333V 数据表(PDF) 5 Page - GSI Technology

部件名 GS8321Z18AD-333V
功能描述  36Mb Pipelined and Flow Through Synchronous NBT SRAM
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制造商  GSI [GSI Technology]
网页  http://www.gsitechnology.com
标志 GSI - GSI Technology

GS8321Z18AD-333V 数据表(HTML) 5 Page - GSI Technology

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GS8321Z18/32/36AD-xxxV
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.03 8/2013
5/31
© 2011, GSI Technology
GS8321Z18/32/36AD-xxxV 165-Bump BGA Pin Description
Symbol
Type
Description
A0, A1
I
Address field LSBs and Address Counter Preset Inputs
An
I
Address Inputs
DQA
DQB
DQC
DQD
I/O
Data Input and Output pins
BA, BB, BC, BD
I
Byte Write Enable for DQA, DQB, DQC, DQD I/Os; active low
CK
I
Clock Input Signal; active high
CKE
I
Clock Enable; active low
W
I
Write Enable; active low
E1
I
Chip Enable; active low
E3
I
Chip Enable; active low
E2
I
Chip Enable; active high
FT
I
Flow Through / Pipeline Mode Control
G
I
Output Enable; active low
ADV
I
Burst address counter advance enable; active high
ZZ
I
Sleep mode control; active high
LBO
I
Linear Burst Order mode; active low
TMS
I
Scan Test Mode Select
TDI
I
Scan Test Data In
TDO
O
Scan Test Data Out
TCK
I
Scan Test Clock
MCH
Must Connect High
VDD
I
Core power supply
VSS
I
I/O and Core Ground
VDDQ
I
Output driver power supply
NC
No Connect


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