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ADV7185 数据表(PDF) 4 Page - Analog Devices |
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ADV7185 数据表(HTML) 4 Page - Analog Devices |
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4 / 40 page  REV. 0 –4– ADV7185 TIMING SPECIFICATIONS1 Parameter Min Typ Max Unit Test Conditions SYSTEM CLOCK AND CRYSTAL Nominal Frequency 27 MHz I 2C PORT3 SCL Clock Frequency 0 400 kHz SCL Min Pulsewidth High, t1 0.6 µs SCL Min Pulsewidth Low, t2 1.3 µs Hold Time (Start Condition), t3 0.6 µs Setup Time (Start Condition), t4 0.6 µs Data Setup Time, t5 100 ns SCL/SDA Rise Time, t6 300 ns SCL/SDA Fall Time, t7 300 ns Setup Time (Stop Condition), t8 0.6 µs RESET FEATURE Reset Pulse Input Width 74 ns CLOCK OUTPUTS 3 LLC1 Cycle Time, t9 37 ns CCIR601 Mode 27 MHz LLC1 Cycle Time, t9 33.9 ns PAL Square Pixel Mode 29.5 MHz LLC1 Cycle Time, t9 40.8 ns NTSC Square Pixel Mode 24.5 MHz LLC1 Min Low Period, t10 18 ns CCIR601 Mode 27 MHz LLC1 Min High Period, t11 18 ns CCIR601 Mode 27 MHz LLC1 Falling to LLCREF Falling, t12 4ns LLC1 Falling to LLCREF Rising, t13 6ns LLC1 Rising to LLC2 Rising, t14 35 ns LLC1 Rising to LLC2 Falling, t15 13 ns CLKIN Cycle Time, t18 37 ns SCAPI and CAPI Modes DATA AND CONTROL OUTPUT Data Output Hold Time, t17 26 ns LLC Mode Data Output Access Time, t16 30 33 ns LLC Mode Data Output Access Time, t19 20 25 ns SCAPI and CAPI Modes Data Output Hold Time, t20 611nsSCAPI and CAPI Modes Propagation Delay to High Z, t21 58 ns Max Output Enable Access Time, t22 811 ns Min Output Enable Access Time, t23 25 ns NOTES 1The max/min specifications are guaranteed over this range. The max/min values are typical over V AA = 4.75 V to 5.25 V, VDD = 3.2 V to 3.5 V, and VDDIO = 3.15 V to 3.5 V range. 2Temperature range T MIN to TMAX = 0 °C to 70°C 3Guaranteed by characterization. Specifications subject to change without notice. (VAA = 4.75 V to 5.25 V, VDD = 3.2 V to 3.5 V, VDDIO = 3.15 V to 3.5 V, TMIN to TMAX 2, unless otherwise noted.) ANALOG FRONT END SPECIFICATIONS1 Parameter Min Typ Max Unit Test Conditions CLAMP CIRCUITRY External Clamp Capacitor 0.1 µF Input Impedance 10 M Ω Clamp Switched Off Voltage Clamp Level 1.4 V Clamp Source Current +3 µA Signal Already Clamped (Fine Clamping) Clamp Sink Current –3 µA Signal Already Clamped (Fine Clamping) Clamp Source Current +0.9 mA Acquire Mode (Fast Clamping) Clamp Sink Current –0.9 mA Acquire Mode (Fast Clamping) NOTES 1The max/min specifications are guaranteed over this range. The max/min values are typical over V AA = 4.75 V to 5.25 V, VDD = 3.2 V to 3.5 V, and VDDIO = 3.15 V to 3.5 V range. 2Temperature range T MIN to TMAX = 0 °C to 70°C Specifications subject to change without notice. (VAA = 4.75 V to 5.25 V, VDD = 3.2 V to 3.5 V, VDDIO = 3.15 V to 3.5 V, TMIN to TMAX 2, unless otherwise noted.) |
类似零件编号 - ADV7185 |
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类似说明 - ADV7185 |
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