Semiconductor Group

134

TDA 6160-2S

eighth bit is always low. The first bit of the first or third data byte in the data part of the telegram

determines whether a divider ratio or control information will follow. In every case the first byte must

be followed by a byte of the same data type (or a stop condition). When the supply voltage is

applied, a power-on reset circuit prevents the PLL from pulling the SDA-line to low and thus blocking

the bus.

Logic Allocations

Chip address (CA)

pin 5 on:

ground

= address byte 1

V

= address byte 2

Test Mode

T2, T1, T0 = 0, 0, 0

normal operation

T2, T1, T0 = 1, 0, 0

pin 2

=

f

REF

T2, T1, T0 = 1, 1, 0

pin 2

=

f

Cy

T2, T1, T0 = 1, 1, 1

pin 2

= tristate

T2, T1, T0 = 0, 1, 1

pin 2

= high-impedance = pin 3 high-impedance

IF-Muting Circuits

Z2, Z1, Z0 = 0, 0, 0

normal operation

Z2, Z1, Z0 = 0, 0, 1

IF 3

= off (output 14 high-impedance)

Z2, Z1, Z0 = 0, 1, 0

IF 2

= off (output 11 high-impedance)

Z2, Z1, Z0 = 0, 1, 1

IF 1 = on; IF 2/IF 3 = off

Z2, Z1, Z0 = 1, 0, 0

IF 1

= off (output 8 high-impedance)

Z2, Z1, Z0 = 1, 0, 1

IF 1 = off; IF 2 = on; IF 3 = off

Z2, Z1, Z0 = 1, 1, 0

IF 3 = on; IF 1/IF 2 = off

Z2, Z1, Z0 = 1, 1, 1

IF 1, IF 2, IF 3 = off

Address byte

Progr. divider byte 1

01000

MA1

MA0

R/W

A

0

0

n10

n9

n8

n7

n6

n5

A

n4

n3

n2

n1

n0

0

0

0

A

1

5I

Z2Z1Z0T2T1T0

A

01000100

A

01000110

A

Progr. divider byte 2

Control information

Address byte 1

Address byte 2

= H46

= H44